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David Alan Gilbert" , , , , , Brijesh Singh , Venu Busireddy Subject: [PATCH v10 13/45] x86/sev: Add a helper for the PVALIDATE instruction Date: Wed, 9 Feb 2022 12:10:07 -0600 Message-ID: <20220209181039.1262882-14-brijesh.singh@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220209181039.1262882-1-brijesh.singh@amd.com> References: <20220209181039.1262882-1-brijesh.singh@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e3ec3cd1-fe9f-4920-130e-08d9ebf7a438 X-MS-TrafficTypeDiagnostic: BYAPR12MB3576:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:6108; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: VMP25WQMfF/qlza76jc6ZMLMtiTSI5w3b+P5PyExmc8VuaUdn3Q2+LbYsfkadqYOlkTYkhK9xdRIAIL11aFITyf5YV1M0M8wznSPgFnUysFWjoC6wJH/e8PJxaZKdU/oiwKasTqi1Q0ONBrCtn2JBZG6TMJ7AA/DRucYMt3IKh8bHlQEQ9cPCRe009FqVAvNwYX/J1zD/83Cfho36JNJgKC5P5ja3kL06OvHg1GNEWUiqqzA/N2gHpbBSeGPHbMZlctTekb8hHYZykzvd1e2Z6aoix2pVHwYhvpyswUA1ON1hFJx/YWYyIHnR1Xc6oJdoxu2ku6yIGt2g/8XXNFiUiRUbt14oZFy1DgXAYwqDYQBTPrGf/twDUwAhqSnQRXU7lVf4lFHYkcv+snaK87TeMB2Ftcgftij39YaO0qyjV2J1K0DPWkRHEVqhtVSHVyBYBIQ8+C8O/7obt2Lh3YrmFH2Sizsqebsq/CcqwT/SuiXQlI6PIJP3SnLjIRGNi4THcYuRXSPe7XKazNnmSZEiM+XgG7lK+dEYVNihKpZOHbXm2xhSvd2DpW/HUvCq4HIEaHs0IilVHEA7dgPDG4BkMlDgPr1J3TczX6A0CDyhh9bPLDQG9lbDNX8HRZGJ+89O8vHhWGh88nU06E7SZIVZYwMqHRr4mOg9f8whU+W/yURKrsQQ0rO4f4RYCkVAbiv2HaNNtl1+ML8/wG0icSAh6g/w0qZ0sXwaax0VQqLXcc= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230001)(4636009)(36840700001)(46966006)(40470700004)(81166007)(16526019)(83380400001)(36860700001)(316002)(44832011)(2906002)(336012)(86362001)(426003)(26005)(186003)(1076003)(54906003)(110136005)(47076005)(7696005)(508600001)(70206006)(6666004)(70586007)(40460700003)(8676002)(36756003)(4326008)(2616005)(356005)(82310400004)(8936002)(7416002)(7406005)(5660300002)(2101003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Feb 2022 18:11:49.3442 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e3ec3cd1-fe9f-4920-130e-08d9ebf7a438 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT039.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR12MB3576 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org An SNP-active guest uses the PVALIDATE instruction to validate or rescind the validation of a guest page’s RMP entry. Upon completion, a return code is stored in EAX and rFLAGS bits are set based on the return code. If the instruction completed successfully, the CF indicates if the content of the RMP were changed or not. See AMD APM Volume 3 for additional details. Reviewed-by: Venu Busireddy Signed-off-by: Brijesh Singh --- arch/x86/include/asm/sev.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/x86/include/asm/sev.h b/arch/x86/include/asm/sev.h index 17b75f6ee11a..4ee98976aed8 100644 --- a/arch/x86/include/asm/sev.h +++ b/arch/x86/include/asm/sev.h @@ -60,6 +60,9 @@ extern void vc_no_ghcb(void); extern void vc_boot_ghcb(void); extern bool handle_vc_boot_ghcb(struct pt_regs *regs); +/* Software defined (when rFlags.CF = 1) */ +#define PVALIDATE_FAIL_NOUPDATE 255 + #ifdef CONFIG_AMD_MEM_ENCRYPT extern struct static_key_false sev_es_enable_key; extern void __sev_es_ist_enter(struct pt_regs *regs); @@ -87,12 +90,30 @@ extern enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb, struct es_em_ctxt *ctxt, u64 exit_code, u64 exit_info_1, u64 exit_info_2); +static inline int pvalidate(unsigned long vaddr, bool rmp_psize, bool validate) +{ + bool no_rmpupdate; + int rc; + + /* "pvalidate" mnemonic support in binutils 2.36 and newer */ + asm volatile(".byte 0xF2, 0x0F, 0x01, 0xFF\n\t" + CC_SET(c) + : CC_OUT(c) (no_rmpupdate), "=a"(rc) + : "a"(vaddr), "c"(rmp_psize), "d"(validate) + : "memory", "cc"); + + if (no_rmpupdate) + return PVALIDATE_FAIL_NOUPDATE; + + return rc; +} #else static inline void sev_es_ist_enter(struct pt_regs *regs) { } static inline void sev_es_ist_exit(void) { } static inline int sev_es_setup_ap_jump_table(struct real_mode_header *rmh) { return 0; } static inline void sev_es_nmi_complete(void) { } static inline int sev_es_efi_map_ghcbs(pgd_t *pgd) { return 0; } +static inline int pvalidate(unsigned long vaddr, bool rmp_psize, bool validate) { return 0; } #endif #endif