From patchwork Thu Nov 17 03:59:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Joseph, Jithu" X-Patchwork-Id: 13046089 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 956BFC4332F for ; Thu, 17 Nov 2022 04:01:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234040AbiKQEBM (ORCPT ); Wed, 16 Nov 2022 23:01:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34360 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234495AbiKQEA7 (ORCPT ); Wed, 16 Nov 2022 23:00:59 -0500 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D3D1941992; Wed, 16 Nov 2022 20:00:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668657658; x=1700193658; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=u9Rornpn2IRVhlMZez6eTlRt7/YpDQ3KZjhhPoPTdn8=; b=Ct9H1tNCHYq8vbD2pmgUScCU+kFtmcd/UDs4TDToBsScIEuuUPPaKj+o qM0VdvJbRYwe2q2iYwNB05bSnmPfZm6aKwH7IlpG21IZ+r+C/YxW52MCP LgW/YSKPIQ6o9ohKgCLfye3asOprdxzzYkMON+n3IvHRjssRECj/uuK1W 7Vfd4Sniqbue7YAdHyB3Ca3ILd8Kl6HabasF/WZDihVbM4F3I3kI/8yU6 u+B53uDkiLTi8Mggd7Oh9Yb7NxQH51ZoNgXLsB5VEAlxM9dI8bR72aVWl lLWt8FZlm4nvqrcAM2OBjxhCQzdjMaIV3/drOM03wgzB4vV5Cbkyj1foL A==; X-IronPort-AV: E=McAfee;i="6500,9779,10533"; a="292455970" X-IronPort-AV: E=Sophos;i="5.96,169,1665471600"; d="scan'208";a="292455970" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Nov 2022 20:00:58 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10533"; a="590462694" X-IronPort-AV: E=Sophos;i="5.96,169,1665471600"; d="scan'208";a="590462694" Received: from jithujos.sc.intel.com ([172.25.103.66]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Nov 2022 20:00:58 -0800 From: Jithu Joseph To: hdegoede@redhat.com, markgross@kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, gregkh@linuxfoundation.org, jithu.joseph@intel.com, ashok.raj@intel.com, tony.luck@intel.com, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, patches@lists.linux.dev, ravi.v.shankar@intel.com, thiago.macieira@intel.com, athenas.jimenez.gonzalez@intel.com, sohil.mehta@intel.com Subject: [PATCH v3 09/16] x86/microcode/intel: Use a reserved field for metasize Date: Wed, 16 Nov 2022 19:59:28 -0800 Message-Id: <20221117035935.4136738-10-jithu.joseph@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221117035935.4136738-1-jithu.joseph@intel.com> References: <20221107225323.2733518-1-jithu.joseph@intel.com> <20221117035935.4136738-1-jithu.joseph@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Intel is using microcode file format for IFS test images too. IFS test images use one of the existing reserved fields in microcode header to indicate the size of the region in the file allocated for metadata structures. In preparation for this, rename first of the existing reserved fields in microcode header to metasize. In subsequent patches IFS specific code will make use of this field while parsing IFS images. Reviewed-by: Tony Luck Reviewed-by: Ashok Raj Reviewed-by: Sohil Mehta Signed-off-by: Jithu Joseph --- arch/x86/include/asm/microcode_intel.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/microcode_intel.h b/arch/x86/include/asm/microcode_intel.h index 2a999bf91ef0..6af1e703cb2e 100644 --- a/arch/x86/include/asm/microcode_intel.h +++ b/arch/x86/include/asm/microcode_intel.h @@ -14,7 +14,8 @@ struct microcode_header_intel { unsigned int pf; unsigned int datasize; unsigned int totalsize; - unsigned int reserved[3]; + unsigned int metasize; + unsigned int reserved[2]; }; struct microcode_intel {