From patchwork Fri Aug 4 08:45:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Choong Yong Liang X-Patchwork-Id: 13341516 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE419C001DB for ; Fri, 4 Aug 2023 08:49:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229660AbjHDItA (ORCPT ); Fri, 4 Aug 2023 04:49:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42422 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229697AbjHDIse (ORCPT ); Fri, 4 Aug 2023 04:48:34 -0400 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9D36830EA; Fri, 4 Aug 2023 01:48:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1691138913; x=1722674913; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=SxjVHGiN7hS1KZCKUjEw/sIjBaSoR9+Z8Xrm4m78es4=; b=cMhTfAUQPH9hnKnP6rR5BklNP4TQBhVWDb/JMUAGDdOETpmw7GU8bKns OQGeYA6s4I6HtTtpcYFRuICW+jOT/UVNm+mkyQWgZzaF8hNXHPANM+wHO Qf8r7jr1n4wh1Fi22wlmTbsjxpUdQYMFrA5+/rkgD42yfbDCaZ2pexweh 0a1VJMhBEk6EZdtpt/K8th43jmoYMMFB4EBoiwjTJ9HpmSN8s33FeW6pn ciDnNn878lsRBOMAew6JcA7mAx80qgQVZR6kd7BCVr+V/hRtVIgEktZ6P HvBfDYfaAn2O0EVX8L+3Ru5XwjouPnqlDh6Efqd5/2Xy7wkNg11R0BYru A==; X-IronPort-AV: E=McAfee;i="6600,9927,10791"; a="456478823" X-IronPort-AV: E=Sophos;i="6.01,254,1684825200"; d="scan'208";a="456478823" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2023 01:48:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10791"; a="765018428" X-IronPort-AV: E=Sophos;i="6.01,254,1684825200"; d="scan'208";a="765018428" Received: from yongliang-ubuntu20-ilbpg12.png.intel.com ([10.88.229.33]) by orsmga001.jf.intel.com with ESMTP; 04 Aug 2023 01:47:57 -0700 From: Choong Yong Liang To: Rajneesh Bhardwaj , David E Box , Hans de Goede , Mark Gross , Jose Abreu , Andrew Lunn , Heiner Kallweit , Russell King , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , =?utf-8?q?Marek_Beh=C3=BAn?= , Jean Delvare , Guenter Roeck , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Philipp Zabel , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Wong Vee Khee , Jon Hunter , Jesse Brandeburg , Revanth Kumar Uppala , Shenwei Wang , Andrey Konovalov , Jochen Henneberg Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Tan Tee Min , Michael Sit Wei Hong , Lai Peter Jun Ann Subject: [PATCH net-next v2 5/5] stmmac: intel: Add 1G/2.5G auto-negotiation support for ADL-N Date: Fri, 4 Aug 2023 16:45:27 +0800 Message-Id: <20230804084527.2082302-6-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230804084527.2082302-1-yong.liang.choong@linux.intel.com> References: <20230804084527.2082302-1-yong.liang.choong@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Add modphy register lane to have 1G/2.5G auto-negotiation support for ADL-N. Signed-off-by: Michael Sit Wei Hong Signed-off-by: Choong Yong Liang --- .../net/ethernet/stmicro/stmmac/dwmac-intel.c | 49 ++++++++++++++++++- .../net/ethernet/stmicro/stmmac/dwmac-intel.h | 2 + 2 files changed, 50 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c index 9f560f18132a..437c7697640f 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c @@ -960,6 +960,53 @@ static int adls_sgmii_phy1_data(struct pci_dev *pdev, static struct stmmac_pci_info adls_sgmii1g_phy1_info = { .setup = adls_sgmii_phy1_data, }; + +static int adln_common_data(struct pci_dev *pdev, + struct plat_stmmacenet_data *plat) +{ + struct intel_priv_data *intel_priv = plat->bsp_priv; + + plat->rx_queues_to_use = 6; + plat->tx_queues_to_use = 4; + plat->clk_ptp_rate = 204800000; + + plat->safety_feat_cfg->tsoee = 1; + plat->safety_feat_cfg->mrxpee = 0; + plat->safety_feat_cfg->mestee = 1; + plat->safety_feat_cfg->mrxee = 1; + plat->safety_feat_cfg->mtxee = 1; + plat->safety_feat_cfg->epsi = 0; + plat->safety_feat_cfg->edpp = 0; + plat->safety_feat_cfg->prtyen = 0; + plat->safety_feat_cfg->tmouten = 0; + + intel_priv->tsn_lane_registers = adln_tsn_lane_registers; + intel_priv->max_tsn_lane_registers = ARRAY_SIZE(adln_tsn_lane_registers); + + return intel_mgbe_common_data(pdev, plat); +} + +static int adln_sgmii_phy0_data(struct pci_dev *pdev, + struct plat_stmmacenet_data *plat) +{ + struct intel_priv_data *intel_priv = plat->bsp_priv; + + plat->bus_id = 1; + plat->phy_interface = PHY_INTERFACE_MODE_SGMII; + plat->max_speed = SPEED_2500; + plat->serdes_powerup = intel_serdes_powerup; + plat->serdes_powerdown = intel_serdes_powerdown; + plat->config_serdes = intel_config_serdes; + + intel_priv->pid_modphy = PID_MODPHY1; + + return adln_common_data(pdev, plat); +} + +static struct stmmac_pci_info adln_sgmii1g_phy0_info = { + .setup = adln_sgmii_phy0_data, +}; + static const struct stmmac_pci_func_data galileo_stmmac_func_data[] = { { .func = 6, @@ -1342,7 +1389,7 @@ static const struct pci_device_id intel_eth_pci_id_table[] = { { PCI_DEVICE_DATA(INTEL, TGLH_SGMII1G_1, &tgl_sgmii1g_phy1_info) }, { PCI_DEVICE_DATA(INTEL, ADLS_SGMII1G_0, &adls_sgmii1g_phy0_info) }, { PCI_DEVICE_DATA(INTEL, ADLS_SGMII1G_1, &adls_sgmii1g_phy1_info) }, - { PCI_DEVICE_DATA(INTEL, ADLN_SGMII1G, &tgl_sgmii1g_phy0_info) }, + { PCI_DEVICE_DATA(INTEL, ADLN_SGMII1G, &adln_sgmii1g_phy0_info) }, { PCI_DEVICE_DATA(INTEL, RPLP_SGMII1G, &tgl_sgmii1g_phy0_info) }, {} }; diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h index 75a336cf8af1..349c160c17b3 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h @@ -124,8 +124,10 @@ static const struct pmc_serdes_regs pid_modphy1_2p5g_regs[] = { {} }; +static const int adln_tsn_lane_registers[] = {6}; static const int ehl_tsn_lane_registers[] = {7, 8, 9, 10, 11}; #else +static const int adln_tsn_lane_registers[] = {}; static const int ehl_tsn_lane_registers[] = {}; #endif /* CONFIG_INTEL_PMC_CORE */