Message ID | 20230814085910.56069-2-vadimp@nvidia.com (mailing list archive) |
---|---|
State | Superseded, archived |
Headers | show
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Add new features and amendments for Nvidia systems
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diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c index 7d33977d9c60..26748c285ddc 100644 --- a/drivers/platform/x86/mlx-platform.c +++ b/drivers/platform/x86/mlx-platform.c @@ -3792,6 +3792,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { .mask = GENMASK(7, 0) & ~BIT(1), .mode = 0444, }, + { + .label = "lid_open", + .reg = MLXPLAT_CPLD_LPC_REG_GP4_RO_OFFSET, + .mask = GENMASK(7, 0) & ~BIT(2), + .mode = 0444, + }, { .label = "clk_brd1_boot_fail", .reg = MLXPLAT_CPLD_LPC_REG_GP4_RO_OFFSET, @@ -4431,6 +4437,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_chassis_blade_regs_io_data[] = { .mask = GENMASK(7, 0) & ~BIT(6), .mode = 0444, }, + { + .label = "reset_long_pwr_pb", + .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, + .mask = GENMASK(7, 0) & ~BIT(7), + .mode = 0444, + }, { .label = "pwr_cycle", .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET,