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Date: Tue, 22 Aug 2023 11:34:50 +0000 Message-ID: <20230822113451.13785-16-vadimp@nvidia.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20230822113451.13785-1-vadimp@nvidia.com> References: <20230822113451.13785-1-vadimp@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [10.126.231.37] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9CE:EE_|SJ2PR12MB8692:EE_ X-MS-Office365-Filtering-Correlation-Id: a4802391-0e41-43b2-ca5c-08dba304882c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: i4fLhfFlZMBYrCbQKNeTqIxpcTr1o7fWdVjemg7UDa57/Iig9gXD4LRdWQN4y9R5jJIxKMj8txLc5+kKlguYnK5Okm/mwweWOWS25lxDTwobEUgE2ZjLXjeppPW3kq7vxNrT7r4GKsAkNL5AUMr9fkAn08LHUAfyYjewiP81vsnFRIcLAii5Nr/Mb2WIVpJW9G2DDBLVBmfhh3QGuPpj++Wguj0fPxC4SlvZMeAbvg0Z6C78FkRgLaQms1eSHXqtZpHPt2FHNqjKfWlLp6fTnHjgRw+xkyHH5LWv4vZu6FFxNjcnCRM8iTZt86qee8znLE1FD0xCc4yAluP6AtM3zwq+JAV1i4kx+miJmIJzWXcKE/rzz3byuvK3gVspltv1BL1vzBHEoU2RdebRnE+hJCf2iO3gBawpelvf7ixF/xEDEdLR2fq2ca4xH3Kho4bBrkfzE8ZU/W4keO+ueV5OXlAIoE3ajv8oGOlXBzLeYjh2m1BctVDd3nxykGzzbuRFAw869XmXlRBjaOfUaZHw753ssznqu2XnOwlTj7Jf+s5ODnNU53epCMpFNl+rA0Ba+IJ9/GvdNMUEuUNNL+7CenOC3HVfyi79FRxxsTgsHSCsrv6YwKmKpt0WwMuPC9tKI9fcX+jwq7ImyI05xjwHHLt1LyXzZ3DFnyAyL9RNtasErCmmNN7FBQtwiHNtVXZb2fpp3DTdDSxm1im7eGQywCi9GMeHrNgFTD1qCvsiLg+QABZA8hg96T6+dB+6WkGp X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230031)(4636009)(39860400002)(346002)(136003)(396003)(376002)(82310400011)(451199024)(1800799009)(186009)(46966006)(40470700004)(36840700001)(356005)(40460700003)(2616005)(8676002)(336012)(426003)(107886003)(26005)(16526019)(36860700001)(47076005)(83380400001)(4326008)(8936002)(2906002)(5660300002)(1076003)(41300700001)(70586007)(478600001)(316002)(54906003)(6916009)(70206006)(82740400003)(40480700001)(86362001)(36756003)(7636003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Aug 2023 11:40:06.1796 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a4802391-0e41-43b2-ca5c-08dba304882c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9CE.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8692 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org From: Michael Shych Define the exact i2c bus (adapter number) of fans on the SN2201 system. This will cause fan's EEPROMs be connected already from nvsw-sn2201 platform driver and not from user space after receiving udev events. Signed-off-by: Michael Shych Reviewed-by: Vadim Pasternak Signed-off-by: Vadim Pasternak Reviewed-by: Hans de Goede Reviewed-by: Ilpo Järvinen --- drivers/platform/mellanox/nvsw-sn2201.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/platform/mellanox/nvsw-sn2201.c b/drivers/platform/mellanox/nvsw-sn2201.c index 7b9c107c17ce..75b699676ca6 100644 --- a/drivers/platform/mellanox/nvsw-sn2201.c +++ b/drivers/platform/mellanox/nvsw-sn2201.c @@ -84,6 +84,10 @@ #define NVSW_SN2201_MAIN_MUX_CH5_NR (NVSW_SN2201_MAIN_MUX_CH0_NR + 5) #define NVSW_SN2201_MAIN_MUX_CH6_NR (NVSW_SN2201_MAIN_MUX_CH0_NR + 6) #define NVSW_SN2201_MAIN_MUX_CH7_NR (NVSW_SN2201_MAIN_MUX_CH0_NR + 7) +#define NVSW_SN2201_2ND_MUX_CH0_NR (NVSW_SN2201_MAIN_MUX_CH7_NR + 1) +#define NVSW_SN2201_2ND_MUX_CH1_NR (NVSW_SN2201_MAIN_MUX_CH7_NR + 2) +#define NVSW_SN2201_2ND_MUX_CH2_NR (NVSW_SN2201_MAIN_MUX_CH7_NR + 3) +#define NVSW_SN2201_2ND_MUX_CH3_NR (NVSW_SN2201_MAIN_MUX_CH7_NR + 4) #define NVSW_SN2201_CPLD_NR NVSW_SN2201_MAIN_MUX_CH0_NR #define NVSW_SN2201_NR_NONE -1 @@ -425,28 +429,28 @@ static struct mlxreg_core_data nvsw_sn2201_fan_items_data[] = { .reg = NVSW_SN2201_FAN_PRSNT_STATUS_OFFSET, .mask = BIT(0), .hpdev.brdinfo = &nvsw_sn2201_fan_devices[0], - .hpdev.nr = NVSW_SN2201_NR_NONE, + .hpdev.nr = NVSW_SN2201_2ND_MUX_CH0_NR, }, { .label = "fan2", .reg = NVSW_SN2201_FAN_PRSNT_STATUS_OFFSET, .mask = BIT(1), .hpdev.brdinfo = &nvsw_sn2201_fan_devices[1], - .hpdev.nr = NVSW_SN2201_NR_NONE, + .hpdev.nr = NVSW_SN2201_2ND_MUX_CH1_NR, }, { .label = "fan3", .reg = NVSW_SN2201_FAN_PRSNT_STATUS_OFFSET, .mask = BIT(2), .hpdev.brdinfo = &nvsw_sn2201_fan_devices[2], - .hpdev.nr = NVSW_SN2201_NR_NONE, + .hpdev.nr = NVSW_SN2201_2ND_MUX_CH2_NR, }, { .label = "fan4", .reg = NVSW_SN2201_FAN_PRSNT_STATUS_OFFSET, .mask = BIT(3), .hpdev.brdinfo = &nvsw_sn2201_fan_devices[3], - .hpdev.nr = NVSW_SN2201_NR_NONE, + .hpdev.nr = NVSW_SN2201_2ND_MUX_CH3_NR, }, };