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Tue, 22 Aug 2023 04:39:57 -0700 Received: from r-build-bsp-02.mtr.labs.mlnx (10.126.231.37) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.37; Tue, 22 Aug 2023 04:39:55 -0700 From: Vadim Pasternak To: CC: , , Vadim Pasternak Subject: [PATCH platform-next v4 16/16] Documentation/ABI: Add new attribute for mlxreg-io sysfs interfaces Date: Tue, 22 Aug 2023 11:34:51 +0000 Message-ID: <20230822113451.13785-17-vadimp@nvidia.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20230822113451.13785-1-vadimp@nvidia.com> References: <20230822113451.13785-1-vadimp@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [10.126.231.37] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9CD:EE_|CY8PR12MB8411:EE_ X-MS-Office365-Filtering-Correlation-Id: 1c0d3920-29d4-4abf-37e5-08dba3048bd3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Aug 2023 11:40:12.3035 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1c0d3920-29d4-4abf-37e5-08dba3048bd3 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9CD.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB8411 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Add documentation for the new attributes: - CPLD versioning: "cpld5_pn", "cpld5_version", "cpld5_version_min". - JTAG capability: "jtag_cap", indicating the available method of CPLD/FPGA devices field update. - System lid status: "lid_open". - Reset caused by long press of power button: "reset_long_pwr_pb". - Reset caused by switch board DC-DC converter device failure: "reset_swb_dc_dc_pwr_fail". Signed-off-by: Vadim Pasternak Reviewed-by: Michael Shych Reviewed-by: Hans de Goede --- v3->v4: Comments provided by Ilpo: - Modify desription for "reset_swb_dc_dc_pwr_fail". v2->v3: Comments provided by Hans: - Document new attribute "reset_swb_dc_dc_pwr_fail". --- .../ABI/stable/sysfs-driver-mlxreg-io | 52 +++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/Documentation/ABI/stable/sysfs-driver-mlxreg-io b/Documentation/ABI/stable/sysfs-driver-mlxreg-io index 60953903d007..115302236627 100644 --- a/Documentation/ABI/stable/sysfs-driver-mlxreg-io +++ b/Documentation/ABI/stable/sysfs-driver-mlxreg-io @@ -662,3 +662,55 @@ Description: This file shows the system reset cause due to AC power failure. Value 1 in file means this is reset cause, 0 - otherwise. The file is read only. + +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld5_pn +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld5_version +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld5_version_min +Date: August 2023 +KernelVersion: 6.6 +Contact: Vadim Pasternak +Description: These files show with which CPLD part numbers, version and minor + versions have been burned the 5-th CPLD device equipped on a + system. + + The files are read only. + +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/jtag_cap +Date: August 2023 +KernelVersion: 6.6 +Contact: Vadim Pasternak +Description: This file indicates the available method of CPLD/FPGA devices + field update through the JTAG chain: + b00 - field update through LPC bus register memory space. + b01 - Reserved. + b10 - Reserved. + b11 - field update through CPU GPIOs bit-banging. + + The file is read only. + +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lid_open +Date: August 2023 +KernelVersion: 6.6 +Contact: Vadim Pasternak +Description: 1 - indicates that system lid is opened, otherwise 0. + + The file is read only. + +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_long_pwr_pb +Date: August 2023 +KernelVersion: 6.6 +Contact: Vadim Pasternak +Description: This file if set 1 indicates that system has been reset by + long press of power button. + + The file is read only. + +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_swb_dc_dc_pwr_fail +Date: August 2023 +KernelVersion: 6.6 +Contact: Vadim Pasternak +Description: This file shows 1 in case the system reset happened due to the + failure of any DC-DC power converter devices equipped on the + switch board. + + The file is read only.