Message ID | 20241010094252.3892406-3-Basavaraj.Natikar@amd.com (mailing list archive) |
---|---|
State | Changes Requested, archived |
Headers | show |
Series | Add support of AMD 3D V-Cache optimizer driver | expand |
Am 10.10.24 um 11:42 schrieb Basavaraj Natikar: > Add documentation for the amd_3d_vcache sysfs bus platform driver > interface so that userspace applications can use it to change mode > preferences, either frequency or cache. > > Co-developed-by: Perry Yuan <perry.yuan@amd.com> > Signed-off-by: Perry Yuan <perry.yuan@amd.com> > Co-developed-by: Mario Limonciello <mario.limonciello@amd.com> > Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> > Reviewed-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> > Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com> > --- > .../sysfs-bus-platform-drivers-amd_x3d_vcache | 14 ++++++++++++++ > MAINTAINERS | 1 + > 2 files changed, 15 insertions(+) > create mode 100644 Documentation/ABI/testing/sysfs-bus-platform-drivers-amd_x3d_vcache > > diff --git a/Documentation/ABI/testing/sysfs-bus-platform-drivers-amd_x3d_vcache b/Documentation/ABI/testing/sysfs-bus-platform-drivers-amd_x3d_vcache > new file mode 100644 > index 000000000000..1aa6ed0c10d9 > --- /dev/null > +++ b/Documentation/ABI/testing/sysfs-bus-platform-drivers-amd_x3d_vcache > @@ -0,0 +1,14 @@ > +What: /sys/bus/platform/drivers/amd_x3d_vcache/AMDI0101\:00/amd_x3d_mode AMDI0101\:00 -> AMDI0101:00 > +Date: October 2024 > +KernelVersion: 6.13 > +Contact: Basavaraj Natikar <Basavaraj.Natikar@amd.com> > +Description: (RW) AMD 3D V-Cache optimizer allows users to switch CPU core > + rankings dynamically. > + > + This file switches between these two modes: > + - "frequency" cores within the faster CCD are prioritized before > + those in the slower CCD. > + - "cache" cores within the larger L3 CCD are prioritized before > + those in the smaller L3 CCD. > + > + Format: %s. What is the purpose of "Format: %s"? Thanks, Armin Wolf > diff --git a/MAINTAINERS b/MAINTAINERS > index 61cb6a294f4c..c7e807770438 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -977,6 +977,7 @@ M: Basavaraj Natikar <Basavaraj.Natikar@amd.com> > R: Mario Limonciello <mario.limonciello@amd.com> > L: platform-driver-x86@vger.kernel.org > S: Supported > +F: Documentation/ABI/testing/sysfs-bus-platform-drivers-amd_x3d_vcache > F: drivers/platform/x86/amd/x3d_vcache.c > > AMD ADDRESS TRANSLATION LIBRARY (ATL)
On 10/11/2024 4:53 PM, Armin Wolf wrote: > Am 10.10.24 um 11:42 schrieb Basavaraj Natikar: > >> Add documentation for the amd_3d_vcache sysfs bus platform driver >> interface so that userspace applications can use it to change mode >> preferences, either frequency or cache. >> >> Co-developed-by: Perry Yuan <perry.yuan@amd.com> >> Signed-off-by: Perry Yuan <perry.yuan@amd.com> >> Co-developed-by: Mario Limonciello <mario.limonciello@amd.com> >> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> >> Reviewed-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> >> Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com> >> --- >> .../sysfs-bus-platform-drivers-amd_x3d_vcache | 14 ++++++++++++++ >> MAINTAINERS | 1 + >> 2 files changed, 15 insertions(+) >> create mode 100644 >> Documentation/ABI/testing/sysfs-bus-platform-drivers-amd_x3d_vcache >> >> diff --git >> a/Documentation/ABI/testing/sysfs-bus-platform-drivers-amd_x3d_vcache >> b/Documentation/ABI/testing/sysfs-bus-platform-drivers-amd_x3d_vcache >> new file mode 100644 >> index 000000000000..1aa6ed0c10d9 >> --- /dev/null >> +++ >> b/Documentation/ABI/testing/sysfs-bus-platform-drivers-amd_x3d_vcache >> @@ -0,0 +1,14 @@ >> +What: >> /sys/bus/platform/drivers/amd_x3d_vcache/AMDI0101\:00/amd_x3d_mode > > AMDI0101\:00 -> AMDI0101:00 > >> +Date: October 2024 >> +KernelVersion: 6.13 >> +Contact: Basavaraj Natikar <Basavaraj.Natikar@amd.com> >> +Description: (RW) AMD 3D V-Cache optimizer allows users to switch >> CPU core >> + rankings dynamically. >> + >> + This file switches between these two modes: >> + - "frequency" cores within the faster CCD are prioritized >> before >> + those in the slower CCD. >> + - "cache" cores within the larger L3 CCD are prioritized before >> + those in the smaller L3 CCD. >> + >> + Format: %s. > > What is the purpose of "Format: %s"? Input takes string format either "frequency" or "cache" I will remove above Format to avoid confusion. Thanks, -- Basavaraj > Thanks, > Armin Wolf > >> diff --git a/MAINTAINERS b/MAINTAINERS >> index 61cb6a294f4c..c7e807770438 100644 >> --- a/MAINTAINERS >> +++ b/MAINTAINERS >> @@ -977,6 +977,7 @@ M: Basavaraj Natikar <Basavaraj.Natikar@amd.com> >> R: Mario Limonciello <mario.limonciello@amd.com> >> L: platform-driver-x86@vger.kernel.org >> S: Supported >> +F: Documentation/ABI/testing/sysfs-bus-platform-drivers-amd_x3d_vcache >> F: drivers/platform/x86/amd/x3d_vcache.c >> >> AMD ADDRESS TRANSLATION LIBRARY (ATL)
diff --git a/Documentation/ABI/testing/sysfs-bus-platform-drivers-amd_x3d_vcache b/Documentation/ABI/testing/sysfs-bus-platform-drivers-amd_x3d_vcache new file mode 100644 index 000000000000..1aa6ed0c10d9 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-platform-drivers-amd_x3d_vcache @@ -0,0 +1,14 @@ +What: /sys/bus/platform/drivers/amd_x3d_vcache/AMDI0101\:00/amd_x3d_mode +Date: October 2024 +KernelVersion: 6.13 +Contact: Basavaraj Natikar <Basavaraj.Natikar@amd.com> +Description: (RW) AMD 3D V-Cache optimizer allows users to switch CPU core + rankings dynamically. + + This file switches between these two modes: + - "frequency" cores within the faster CCD are prioritized before + those in the slower CCD. + - "cache" cores within the larger L3 CCD are prioritized before + those in the smaller L3 CCD. + + Format: %s. diff --git a/MAINTAINERS b/MAINTAINERS index 61cb6a294f4c..c7e807770438 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -977,6 +977,7 @@ M: Basavaraj Natikar <Basavaraj.Natikar@amd.com> R: Mario Limonciello <mario.limonciello@amd.com> L: platform-driver-x86@vger.kernel.org S: Supported +F: Documentation/ABI/testing/sysfs-bus-platform-drivers-amd_x3d_vcache F: drivers/platform/x86/amd/x3d_vcache.c AMD ADDRESS TRANSLATION LIBRARY (ATL)