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Co-developed-by: Perry Yuan Signed-off-by: Perry Yuan Co-developed-by: Mario Limonciello Signed-off-by: Mario Limonciello Reviewed-by: Shyam Sundar S K Signed-off-by: Basavaraj Natikar --- .../sysfs-bus-platform-drivers-amd_x3d_vcache | 14 ++++++++++++++ MAINTAINERS | 1 + 2 files changed, 15 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-bus-platform-drivers-amd_x3d_vcache diff --git a/Documentation/ABI/testing/sysfs-bus-platform-drivers-amd_x3d_vcache b/Documentation/ABI/testing/sysfs-bus-platform-drivers-amd_x3d_vcache new file mode 100644 index 000000000000..1aa6ed0c10d9 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-platform-drivers-amd_x3d_vcache @@ -0,0 +1,14 @@ +What: /sys/bus/platform/drivers/amd_x3d_vcache/AMDI0101\:00/amd_x3d_mode +Date: October 2024 +KernelVersion: 6.13 +Contact: Basavaraj Natikar +Description: (RW) AMD 3D V-Cache optimizer allows users to switch CPU core + rankings dynamically. + + This file switches between these two modes: + - "frequency" cores within the faster CCD are prioritized before + those in the slower CCD. + - "cache" cores within the larger L3 CCD are prioritized before + those in the smaller L3 CCD. + + Format: %s. diff --git a/MAINTAINERS b/MAINTAINERS index 61cb6a294f4c..c7e807770438 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -977,6 +977,7 @@ M: Basavaraj Natikar R: Mario Limonciello L: platform-driver-x86@vger.kernel.org S: Supported +F: Documentation/ABI/testing/sysfs-bus-platform-drivers-amd_x3d_vcache F: drivers/platform/x86/amd/x3d_vcache.c AMD ADDRESS TRANSLATION LIBRARY (ATL)