Message ID | 1589295294-26466-1-git-send-email-sai.pavan.boddu@xilinx.com (mailing list archive) |
---|---|
Headers | show |
Series | Cadence GEM Fixes | expand |
On 2020/5/12 下午10:54, Sai Pavan Boddu wrote: > Hi, > > Following patch series fixes issues with priority queues, > Adds JUMBO Frame support, > Makes Debug statements compilable & > Fixes related to multicast frames. > > Changes for V2: > Fixed build failure on fedora docker machine > Fix buggy debug print to use sized integer casting > Changes for V3: > 1/10: Fixed debug statments to use %u and %zd > Remove rxoffset for buffer address > 2/10: Add inline functions to get tx/rx queue base address. > 4/10: fix read only mask > 5/10: Move packet buffers to CadenceGEMState > 6/10: Add JUMBO MAX LEN register > Changes for V4: > 7/11: Fix up the existing code style in register defines > 8/11: jumbo-max-len property sets the default value of jumbo frame > Add frame lenght checks for tx and rx > Changes for V5: > 8/11: Add a cap on jumbo frame size and print guest errors if exceeded. > Move jumo_max_len property into static properties section. > > Sai Pavan Boddu (11): > net: cadence_gem: Fix debug statements > net: cadence_gem: Fix the queue address update during wrap around > net: cadence_gem: Fix irq update w.r.t queue > net: cadence_gem: Define access permission for interrupt registers > net: cadence_gem: Set ISR according to queue in use > net: cadence_gem: Move tx/rx packet buffert to CadenceGEMState > net: cadence_gem: Fix up code style > net: cadence_gem: Add support for jumbo frames > net: cadnece_gem: Update irq_read_clear field of designcfg_debug1 reg > net: cadence_gem: Update the reset value for interrupt mask register > net: cadence_gem: TX_LAST bit should be set by guest > > Tong Ho (1): > net: cadence_gem: Fix RX address filtering > > hw/net/cadence_gem.c | 458 ++++++++++++++++++++++++------------------- > include/hw/net/cadence_gem.h | 6 + > 2 files changed, 265 insertions(+), 199 deletions(-) > Applied. Thanks