Message ID | 20200828113931.3252489-1-edgar.iglesias@gmail.com (mailing list archive) |
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Headers | show
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[81.231.232.130]) by smtp.gmail.com with ESMTPSA id k4sm151927ljc.50.2020.08.28.04.39.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Aug 2020 04:39:31 -0700 (PDT) From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> To: qemu-devel@nongnu.org Subject: [PATCH v1 0/2] target/microblaze: Improve bus fault handling Date: Fri, 28 Aug 2020 13:39:29 +0200 Message-Id: <20200828113931.3252489-1-edgar.iglesias@gmail.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::243; envelope-from=edgar.iglesias@gmail.com; helo=mail-lj1-x243.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. 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Series |
target/microblaze: Improve bus fault handling
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From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> Richards recent MicroBlaze patches exposed a bug in the MB ports bus fault handling. If the core is not setup for exceptions, we clobber the CPU state when preparing to raise one. This fixes the bug. Best regards, Edgar Edgar E. Iglesias (2): target/microblaze: Use CPU properties to conditionalize bus exceptions target/microblaze: Improve transaction failure handling target/microblaze/op_helper.c | 19 +++++++------------ 1 file changed, 7 insertions(+), 12 deletions(-)