[0/3] Fix irq allocation of PCI host bridge on powernv

Message

Frederic Barrat Nov. 16, 2021, 5:01 p.m. UTC

This series removes a bogus allocation of a LSI interrupt for the PCI
Host Bridge found in the powernv model (phb4). The real hardware
doesn't declare any LSI, so the model should match. It was causing
some inconsistencies in the interrupt controller data.

However, removing that LSI shows that the PCI AER code assumes an
interrupt is defined (LSI or MSI or MSI-X), which is not the case with
the root bridge device on powernv. So the last patch adds a check to
make sure a LSI is defined before entering pci_set_irq() as it asserts
if it's called with no LSI defined.


Frederic Barrat (3):
  ppc/pnv: Tune the POWER9 PCIe Host bridge model
  pci: Export the pci_intx() function
  pcie_aer: Don't trigger a LSI if none are defined

 hw/pci-host/pnv_phb4.c | 5 ++++-
 hw/pci/pci.c           | 5 -----
 hw/pci/pcie_aer.c      | 4 +++-
 include/hw/pci/pci.h   | 5 +++++
 4 files changed, 12 insertions(+), 7 deletions(-)