| Message ID | 20220715205439.161110-1-victor.colombo@eldorado.org.br (mailing list archive) |
|---|---|
| Headers | show |
| Series | Implement Power ISA 3.1B hash insns | expand |
Queued in gitlab.com/danielhb/qemu/tree/ppc-next. Thanks, Daniel On 7/15/22 17:54, Víctor Colombo wrote: > This patch series implements the 4 instructions added in Power ISA > 3.1B: > > - hashchk > - hashst > - hashchkp > - hashstp > > It's built on top of ppc-next. Working branch for ease of use can be > found here: > https://github.com/PPC64/qemu/tree/vccolombo-hash-to-send-v4 > > What do you think about the choice to implement the hash algorithm > from the ground up, following the SIMON-like algorithm presented in > Power ISA? IIUC, this algorithm is not the same as the original[1]. > Other options would be to use other algorithm already implemented > in QEMU, or even make this instruction a nop for all Power versions. > > v1->v2: > - Split the patch in 2 > - Rebase to master > > v2->v3: > - Split patches in 3 > - the new patch (patch 1) is separating the kvm header > changes [Cornelia] > > v3->v4: > - Remove Patch 1 (linux-headers/asm-powerpc/kvm.h: > Add HASHKEYR and HASHPKEYR in headers) > - Daniel recommended drop the kvm part: > https://lists.nongnu.org/archive/html/qemu-ppc/2022-07/msg00213.html > - Substitute Patch 1 with a separated patch setting up the registers > for TCG only. Also, now setup it with a random value in linux-user. > - Change the registers naming: > - SPR_POWER_HASHKEYR -> SPR_HASHKEYR > - Drop RFC tag > > [1] https://eprint.iacr.org/2013/404.pdf > > Víctor Colombo (3): > target/ppc: Add HASHKEYR and HASHPKEYR SPRs > target/ppc: Implement hashst and hashchk > target/ppc: Implement hashstp and hashchkp > > target/ppc/cpu.h | 2 + > target/ppc/cpu_init.c | 28 ++++++++ > target/ppc/excp_helper.c | 84 ++++++++++++++++++++++ > target/ppc/helper.h | 4 ++ > target/ppc/insn32.decode | 10 +++ > target/ppc/translate.c | 5 ++ > target/ppc/translate/fixedpoint-impl.c.inc | 34 +++++++++ > 7 files changed, 167 insertions(+) >
This patch series implements the 4 instructions added in Power ISA 3.1B: - hashchk - hashst - hashchkp - hashstp It's built on top of ppc-next. Working branch for ease of use can be found here: https://github.com/PPC64/qemu/tree/vccolombo-hash-to-send-v4 What do you think about the choice to implement the hash algorithm from the ground up, following the SIMON-like algorithm presented in Power ISA? IIUC, this algorithm is not the same as the original[1]. Other options would be to use other algorithm already implemented in QEMU, or even make this instruction a nop for all Power versions. v1->v2: - Split the patch in 2 - Rebase to master v2->v3: - Split patches in 3 - the new patch (patch 1) is separating the kvm header changes [Cornelia] v3->v4: - Remove Patch 1 (linux-headers/asm-powerpc/kvm.h: Add HASHKEYR and HASHPKEYR in headers) - Daniel recommended drop the kvm part: https://lists.nongnu.org/archive/html/qemu-ppc/2022-07/msg00213.html - Substitute Patch 1 with a separated patch setting up the registers for TCG only. Also, now setup it with a random value in linux-user. - Change the registers naming: - SPR_POWER_HASHKEYR -> SPR_HASHKEYR - Drop RFC tag [1] https://eprint.iacr.org/2013/404.pdf Víctor Colombo (3): target/ppc: Add HASHKEYR and HASHPKEYR SPRs target/ppc: Implement hashst and hashchk target/ppc: Implement hashstp and hashchkp target/ppc/cpu.h | 2 + target/ppc/cpu_init.c | 28 ++++++++ target/ppc/excp_helper.c | 84 ++++++++++++++++++++++ target/ppc/helper.h | 4 ++ target/ppc/insn32.decode | 10 +++ target/ppc/translate.c | 5 ++ target/ppc/translate/fixedpoint-impl.c.inc | 34 +++++++++ 7 files changed, 167 insertions(+)