| Message ID | 20221004092351.18209-1-sunilvl@ventanamicro.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | hw/riscv: virt: Enable booting S-mode firmware from pflash | expand |
On Tue, Oct 4, 2022 at 7:25 PM Sunil V L <sunilvl@ventanamicro.com> wrote: > > This series adds the support to boot S-mode FW like EDK2 from the flash. The > S-mode firmware should be kept in pflash unit 1. > > When -kernel (and -initrd) option is also provided along with the flash, > the kernel (and initrd) will be loaded into fw_cfg table and opensbi will > branch to the flash address which will be the entry point of the S-mode > firmware. The S-mode FW then loads and launches the kernel. > > When only -pflash option is provided in the command line, the kernel > will be located and loaded in the usual way by the S-mode firmware. > > These patches are available in below branch. > https://github.com/vlsunil/qemu/tree/pflash_v2 > > The first two patches in this series are refactor patches. > > These changes are tested with a WIP EDK2 port for virt machine. Below > are the instructions to build and test this feature. > > 1) Get EDK2 sources from below branches. > https://github.com/vlsunil/edk2/tree/virt_refactor_smode_v1 > https://github.com/vlsunil/edk2-platforms/tree/virt_refactor_smode_v1 > > 2) Build EDK2 for RISC-V > export WORKSPACE=`pwd` > export GCC5_RISCV64_PREFIX=riscv64-linux-gnu- > export PACKAGES_PATH=$WORKSPACE/edk2:$WORKSPACE/edk2-platforms > export EDK_TOOLS_PATH=$WORKSPACE/edk2/BaseTools > source edk2/edksetup.sh > make -C edk2/BaseTools clean > make -C edk2/BaseTools > make -C edk2/BaseTools/Source/C > source edk2/edksetup.sh BaseTools > build -a RISCV64 -p Platform/Qemu/RiscVVirt/RiscVVirt.dsc -t GCC5 > > 3)Make the EDK2 image size to match with what qemu flash expects > truncate -s 32M Build/RiscVVirt/DEBUG_GCC5/FV/RISCV_VIRT.fd > > 4) Run > a) Boot to EFI shell (no -kernel / -initrd option) > qemu-system-riscv64 -nographic -drive file=Build/RiscVVirt/DEBUG_GCC5/FV/RISCV_VIRT.fd,if=pflash,format=raw,unit=1 -machine virt -M 2G > > b) With -kernel, -initrd and -pflash > qemu-system-riscv64 -nographic -drive file=Build/RiscVVirt/DEBUG_GCC5/FV/RISCV_VIRT.fd,if=pflash,format=raw,unit=1 -machine virt -M 2G -kernel arch/riscv/boot/Image.gz -initrd rootfs.cpio > > > Changes since V4: > 1) Rebased on riscv-to-apply.next branch > 2) Added RB tags > 3) Gerd's feedback on removing the truncate requirement will be addressed as separate > patch in future. > > Changes since V3: > 1) White space and comment edits > 2) Added RB tag > > Changes since V2: > 1) Moved the doc comment to .h file > > Changes since V1: > 1) Modified code to support the use case when both -kernel and -pflash are configured. > 2) Refactor patches added to help (1) above. > 3) Cover letter added with test instructions. > > Sunil V L (3): > hw/arm,loongarch: Move load_image_to_fw_cfg() to common location > hw/riscv: virt: Move create_fw_cfg() prior to loading kernel > hw/riscv: virt: Enable booting S-mode firmware from pflash Thanks! Applied to riscv-to-apply.next Alistair > > hw/arm/boot.c | 49 --------------------------------------- > hw/loongarch/virt.c | 33 -------------------------- > hw/nvram/fw_cfg.c | 32 +++++++++++++++++++++++++ > hw/riscv/boot.c | 29 +++++++++++++++++++++++ > hw/riscv/virt.c | 32 ++++++++++++++++++------- > include/hw/nvram/fw_cfg.h | 21 +++++++++++++++++ > include/hw/riscv/boot.h | 1 + > 7 files changed, 107 insertions(+), 90 deletions(-) > > -- > 2.25.1 > >
This series adds the support to boot S-mode FW like EDK2 from the flash. The S-mode firmware should be kept in pflash unit 1. When -kernel (and -initrd) option is also provided along with the flash, the kernel (and initrd) will be loaded into fw_cfg table and opensbi will branch to the flash address which will be the entry point of the S-mode firmware. The S-mode FW then loads and launches the kernel. When only -pflash option is provided in the command line, the kernel will be located and loaded in the usual way by the S-mode firmware. These patches are available in below branch. https://github.com/vlsunil/qemu/tree/pflash_v2 The first two patches in this series are refactor patches. These changes are tested with a WIP EDK2 port for virt machine. Below are the instructions to build and test this feature. 1) Get EDK2 sources from below branches. https://github.com/vlsunil/edk2/tree/virt_refactor_smode_v1 https://github.com/vlsunil/edk2-platforms/tree/virt_refactor_smode_v1 2) Build EDK2 for RISC-V export WORKSPACE=`pwd` export GCC5_RISCV64_PREFIX=riscv64-linux-gnu- export PACKAGES_PATH=$WORKSPACE/edk2:$WORKSPACE/edk2-platforms export EDK_TOOLS_PATH=$WORKSPACE/edk2/BaseTools source edk2/edksetup.sh make -C edk2/BaseTools clean make -C edk2/BaseTools make -C edk2/BaseTools/Source/C source edk2/edksetup.sh BaseTools build -a RISCV64 -p Platform/Qemu/RiscVVirt/RiscVVirt.dsc -t GCC5 3)Make the EDK2 image size to match with what qemu flash expects truncate -s 32M Build/RiscVVirt/DEBUG_GCC5/FV/RISCV_VIRT.fd 4) Run a) Boot to EFI shell (no -kernel / -initrd option) qemu-system-riscv64 -nographic -drive file=Build/RiscVVirt/DEBUG_GCC5/FV/RISCV_VIRT.fd,if=pflash,format=raw,unit=1 -machine virt -M 2G b) With -kernel, -initrd and -pflash qemu-system-riscv64 -nographic -drive file=Build/RiscVVirt/DEBUG_GCC5/FV/RISCV_VIRT.fd,if=pflash,format=raw,unit=1 -machine virt -M 2G -kernel arch/riscv/boot/Image.gz -initrd rootfs.cpio Changes since V4: 1) Rebased on riscv-to-apply.next branch 2) Added RB tags 3) Gerd's feedback on removing the truncate requirement will be addressed as separate patch in future. Changes since V3: 1) White space and comment edits 2) Added RB tag Changes since V2: 1) Moved the doc comment to .h file Changes since V1: 1) Modified code to support the use case when both -kernel and -pflash are configured. 2) Refactor patches added to help (1) above. 3) Cover letter added with test instructions. Sunil V L (3): hw/arm,loongarch: Move load_image_to_fw_cfg() to common location hw/riscv: virt: Move create_fw_cfg() prior to loading kernel hw/riscv: virt: Enable booting S-mode firmware from pflash hw/arm/boot.c | 49 --------------------------------------- hw/loongarch/virt.c | 33 -------------------------- hw/nvram/fw_cfg.c | 32 +++++++++++++++++++++++++ hw/riscv/boot.c | 29 +++++++++++++++++++++++ hw/riscv/virt.c | 32 ++++++++++++++++++------- include/hw/nvram/fw_cfg.h | 21 +++++++++++++++++ include/hw/riscv/boot.h | 1 + 7 files changed, 107 insertions(+), 90 deletions(-)