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[RFC,v2,0/2] target/riscv: use a simplified loop to emulate rvv loads/stores only in user mode.

Message ID 20241002135708.99146-1-paolo.savini@embecosm.com (mailing list archive)
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Series target/riscv: use a simplified loop to emulate rvv loads/stores only in user mode. | expand

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Paolo Savini Oct. 2, 2024, 1:57 p.m. UTC 
The new version of the patch addresses the suggestion given by Richard Handerson
here:

https://patchew.org/QEMU/20240717153040.11073-1-paolo.savini@embecosm.com/20240717153040.11073-2-paolo.savini@embecosm.com/#aff5f930-d291-4ff5-8f24-53291059d59a@linaro.org

about the ineffectiveness of the optimization of the load/store loop for small
vector and data sizes when QEMU is in system mode.

Changes:
- Wrap the optimization of simple RISC-V vector unit-stride loads and stores into a user mode configuration directive.

Cc: Richard Handerson <richard.henderson@linaro.org>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Alistair Francis <alistair.francis@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Weiwei Li <liwei1518@gmail.com>
Cc: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Cc: Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
Cc: Helene Chelin <helene.chelin@embecosm.com>
Cc: Nathan Egge <negge@google.com>
Cc: Max Chou <max.chou@sifive.com>

Helene CHELIN (1):
  target/riscv: rvv: reduce the overhead for simple RISC-V vector
    unit-stride loads and stores

Paolo Savini (1):
  target/riscv: use a simplified loop to emulate rvv loads/stores only in user mode.

 target/riscv/vector_helper.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)