mbox series

[v1,0/8] Support RTC for AST2700

Message ID 20241029091729.3317512-1-jamin_lin@aspeedtech.com (mailing list archive)
Headers show
Series Support RTC for AST2700 | expand

Message

Jamin Lin Oct. 29, 2024, 9:17 a.m. UTC
change from v1:
1. Support RTC for AST2700.
2. Support SDHCI write protected pin inverted for AST2500 and AST2600.
3. Introduce Capabilities Register 2 for SD slot 0 and 1.
4. Support create flash devices via command line for AST1030.

Jamin Lin (8):
  aspeed/soc: Support RTC for AST2700
  hw/timer/aspeed: Fix coding style
  hw/timer/aspeed: Fix interrupt status does not be cleared for AST2600
  hw/sd/sdhci: Fix coding style
  hw/sd/sdhci: Introduce a new Write Protected pin inverted property
  hw/sd/aspeed_sdhci: Introduce Capabilities Register 2 for SD slot 0
    and 1
  hw/arm/aspeed: Invert sdhci write protected pin for AST2600 and
    AST2500 EVBs
  aspeed: Support create flash devices via command line for AST1030

 hw/arm/aspeed.c         | 30 ++++++++++++------
 hw/arm/aspeed_ast27x0.c | 11 +++++++
 hw/sd/aspeed_sdhci.c    | 40 ++++++++++++++++-------
 hw/sd/sdhci.c           | 70 ++++++++++++++++++++++++++++-------------
 hw/timer/aspeed_timer.c | 15 +++++----
 include/hw/arm/aspeed.h |  1 +
 include/hw/sd/sdhci.h   |  5 +++
 7 files changed, 123 insertions(+), 49 deletions(-)

Comments

Cédric Le Goater Nov. 2, 2024, 3:03 p.m. UTC | #1
On 10/29/24 10:17, Jamin Lin wrote:
> change from v1:
> 1. Support RTC for AST2700.
> 2. Support SDHCI write protected pin inverted for AST2500 and AST2600.
> 3. Introduce Capabilities Register 2 for SD slot 0 and 1.
> 4. Support create flash devices via command line for AST1030.
> 
> Jamin Lin (8):
>    aspeed/soc: Support RTC for AST2700
>    hw/timer/aspeed: Fix coding style
>    hw/timer/aspeed: Fix interrupt status does not be cleared for AST2600
>    hw/sd/sdhci: Fix coding style
>    hw/sd/sdhci: Introduce a new Write Protected pin inverted property
>    hw/sd/aspeed_sdhci: Introduce Capabilities Register 2 for SD slot 0
>      and 1
>    hw/arm/aspeed: Invert sdhci write protected pin for AST2600 and
>      AST2500 EVBs
>    aspeed: Support create flash devices via command line for AST1030
> 
>   hw/arm/aspeed.c         | 30 ++++++++++++------
>   hw/arm/aspeed_ast27x0.c | 11 +++++++
>   hw/sd/aspeed_sdhci.c    | 40 ++++++++++++++++-------
>   hw/sd/sdhci.c           | 70 ++++++++++++++++++++++++++++-------------
>   hw/timer/aspeed_timer.c | 15 +++++----
>   include/hw/arm/aspeed.h |  1 +
>   include/hw/sd/sdhci.h   |  5 +++
>   7 files changed, 123 insertions(+), 49 deletions(-)
> 

Applied 1,2,3,6,8 to aspeed-next.

Thanks,

C.
Jamin Lin Nov. 4, 2024, 1:16 a.m. UTC | #2
Hi Cedric,

> Subject: Re: [SPAM] [PATCH v1 0/8] Support RTC for AST2700
> 
> On 10/29/24 10:17, Jamin Lin wrote:
> > change from v1:
> > 1. Support RTC for AST2700.
> > 2. Support SDHCI write protected pin inverted for AST2500 and AST2600.
> > 3. Introduce Capabilities Register 2 for SD slot 0 and 1.
> > 4. Support create flash devices via command line for AST1030.
> >
> > Jamin Lin (8):
> >    aspeed/soc: Support RTC for AST2700
> >    hw/timer/aspeed: Fix coding style
> >    hw/timer/aspeed: Fix interrupt status does not be cleared for AST2600
> >    hw/sd/sdhci: Fix coding style
> >    hw/sd/sdhci: Introduce a new Write Protected pin inverted property
> >    hw/sd/aspeed_sdhci: Introduce Capabilities Register 2 for SD slot 0
> >      and 1
> >    hw/arm/aspeed: Invert sdhci write protected pin for AST2600 and
> >      AST2500 EVBs
> >    aspeed: Support create flash devices via command line for AST1030
> >
> >   hw/arm/aspeed.c         | 30 ++++++++++++------
> >   hw/arm/aspeed_ast27x0.c | 11 +++++++
> >   hw/sd/aspeed_sdhci.c    | 40 ++++++++++++++++-------
> >   hw/sd/sdhci.c           | 70
> ++++++++++++++++++++++++++++-------------
> >   hw/timer/aspeed_timer.c | 15 +++++----
> >   include/hw/arm/aspeed.h |  1 +
> >   include/hw/sd/sdhci.h   |  5 +++
> >   7 files changed, 123 insertions(+), 49 deletions(-)
> >
> 
> Applied 1,2,3,6,8 to aspeed-next.
> 

Thanks for your help.
Will resend 4,5 and 7 patches in v2.
Thanks-Jamin
> Thanks,
> 
> C.
>