mbox series

[RFC,v6,0/2] Support RISC-V CSR read/write in Qtest environment

Message ID 20241112143826.88130-1-ivan.klokov@syntacore.com (mailing list archive)
Headers show
Series Support RISC-V CSR read/write in Qtest environment | expand

Message

Ivan Klokov Nov. 12, 2024, 2:38 p.m. UTC
These patches add functionality for unit testing RISC-V-specific registers.
The first patch adds a Qtest backend, and the second implements a simple test.

---
v6:
   - Refactor code and fix checkpatch errors.
---

Ivan Klokov (2):
  target/riscv: Add RISC-V CSR qtest support
  tests/qtest: QTest example for RISC-V CSR register

 hw/riscv/riscv_hart.c        | 55 +++++++++++++++++++++++++++++++++++
 tests/qtest/libqtest.c       | 27 +++++++++++++++++
 tests/qtest/libqtest.h       | 14 +++++++++
 tests/qtest/meson.build      |  2 +-
 tests/qtest/riscv-csr-test.c | 56 ++++++++++++++++++++++++++++++++++++
 5 files changed, 153 insertions(+), 1 deletion(-)
 create mode 100644 tests/qtest/riscv-csr-test.c