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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc7edge1.nvidia.com; CAT:NONE; SFS:(13230040)(376014)(82310400026)(36860700013)(1800799024)(7416014); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Dec 2024 13:04:53.7394 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 32f2d633-ab45-421c-1352-08dd1aad9212 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.118.232]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF00017099.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6289 Received-SPF: softfail client-ip=40.107.243.73; envelope-from=zhiw@nvidia.com; helo=NAM12-DM6-obe.outbound.protection.outlook.com X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.496, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H2=-0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi folks: Per the discussion with Ira/Jonathan in the LPC 2024 and in the CXL discord channel, we are trying to introduce a CXL type-2 device emulation in QEMU, as there are work currently on supporting CXL type-2 device [1] in Linux kernel and CXL type-2 device virtualization [2]. It provides a bare minimum base for folks who would like to: - Contribute and test the CXL type-2 device support in the linux kernel and CXL type-2 virtualization without having an actual HW. - Introduce more emulated features to prototype the kernel CXL type-2 device features and CXL type-2 virtualization. To test this patchset, please refer to steps in [3]. Use this patcheset with the latest QEMU repo to be the QEMU host. It achieves the same output as in the demo video [4]: The VFIO CXL core and VFIO CXL sample variant driver can be attached to the emulated device in the L1 guest and assigned to the L2 guest. The sample driver in the L2 guest can attach to the pass-thrued device and create the CXL region. Tested on the CXL type-2 virtualization RFC patches [3] with an extra fix [5]. [1] https://lore.kernel.org/linux-cxl/20241209185429.54054-1-alejandro.lucero-palau@amd.com/T/#t [2] https://www.youtube.com/watch?v=e5OW1pR84Zs [3] https://lore.kernel.org/kvm/20240920223446.1908673-3-zhiw@nvidia.com/T/ [4] https://youtu.be/zlk_ecX9bxs?si=pf9CttcGT5KwUgiH [5] https://lore.kernel.org/linux-cxl/20241212123959.68514-1-zhiw@nvidia.com/T/#u Zhi Wang (3): hw/cxl: factor out cxl_host_addr_to_dpa() hw/cxl: introduce cxl_component_update_dvsec() hw/cxl: introduce CXL type-2 device emulation MAINTAINERS | 1 + docs/system/devices/cxl.rst | 11 ++ hw/cxl/cxl-component-utils.c | 103 ++++++++++- hw/cxl/cxl-host.c | 19 +- hw/mem/Kconfig | 5 + hw/mem/cxl_accel.c | 319 +++++++++++++++++++++++++++++++++ hw/mem/cxl_type3.c | 61 +------ hw/mem/meson.build | 1 + include/hw/cxl/cxl_component.h | 7 + include/hw/cxl/cxl_device.h | 25 +++ include/hw/pci/pci_ids.h | 1 + 11 files changed, 484 insertions(+), 69 deletions(-) create mode 100644 hw/mem/cxl_accel.c