[RFC,v2,00/81] tcg: Merge *_i32 and *_i64 opcodes

Message

Richard Henderson Jan. 7, 2025, 7:59 a.m. UTC

Currently we have individual opcodes for each integer type.
This makes things difficult in tcg/optimize.c when we want
to transform the opcode stream.

Add TCGOP_TYPE() and use that instead.  Merge the opcodes that are
common to both TCG_TYPE_I32 and TCG_TYPE_I64.  We could eventually
merge some of the vector opcodes too, but that is a larger job.

This also moves quite a lot of the tcg backend implementation out
of the publicly exposed headers.  After this patchset is complete,
we will not rebuild target translators for most changes to the tcg
backend.

Changes for v2:
  - Begin reorganizing the tcg backends.  Create structures that
    encapsulate availability, constraints, and output routines.
    The intent is to keep everything related to an opcode together,
    so that code for a specific opcode is not scattered around
    multiple functions and multiple files.

    This conversion is incomplete.  I've completed the basic
    arithmetic opcodes.

    This is the place where I'd like feedback on readability.

  - Replace TCGOp.type with TCGOP_TYPE.
  - Add TCGOP_FLAGS, not used so far in v2, but intended to
    be used with especially load/store opcodes.


r~


Richard Henderson (81):
  tcg: Move call abi parameters from tcg-target.h to tcg-target.c.inc
  tcg: Replace TCGOP_VECL with TCGOP_TYPE
  tcg: Move tcg_op_insert_{after,before} decls to tcg-internal.h
  tcg: Copy TCGOP_TYPE in tcg_op_insert_{after,before}
  tcg: Add TCGOP_FLAGS
  tcg: Add type and flags arguments to tcg_op_supported
  target/arm: Do not test TCG_TARGET_HAS_bitsel_vec
  target/arm: Use tcg_op_supported
  target/tricore: Use tcg_op_supported
  tcg: Add tcg_op_deposit_valid
  target/i386: Remove TCG_TARGET_extract_tl_valid
  target/i386: Use tcg_op_deposit_valid
  target/i386: Use tcg_op_supported
  tcg: Remove TCG_TARGET_NEED_LDST_LABELS and
    TCG_TARGET_NEED_POOL_LABELS
  tcg: Rename tcg-target.opc.h to tcg-target-opc.h.inc
  tcg/tci: Move TCI specific opcodes to tcg-target-opc.h.inc
  tcg: Move fallback tcg_can_emit_vec_op out of line
  tcg: Split out tcg-target-has.h and tcg-has.h
  tcg: Split out tcg-target-mo.h
  tcg: Use C_NotImplemented in tcg_target_op_def
  tcg: Change have_vec to has_type in tcg_op_supported
  tcg: Reorg process_op_defs
  tcg: Remove args_ct from TCGOpDef
  tcg: Constify tcg_op_defs
  tcg: Validate op supported in opcode_args_ct
  tcg: Add TCG_OPF_NOT_PRESENT to opcodes without inputs or outputs
  tcg: Pass type and flags to tcg_target_op_def
  tcg: Add TCGType argument to tcg_out_op
  tcg: Remove TCG_OPF_64BIT
  tcg: Drop implementation checks from tcg-opc.h
  tcg: Replace IMPLVEC with TCG_OPF_VECTOR
  tcg/mips: Expand bswap unconditionally
  tcg/i386: Handle all 8-bit extensions for i686
  tcg/i386: Fold the ext{8,16,32}[us] cases into {s}extract
  tcg/aarch64: Provide TCG_TARGET_{s}extract_valid
  tcg/aarch64: Expand extract with offset 0 with andi
  tcg/arm: Add full [US]XT[BH] into {s}extract
  tcg/loongarch64: Fold the ext{8,16,32}[us] cases into {s}extract
  tcg/mips: Fold the ext{8,16,32}[us] cases into {s}extract
  tcg/ppc: Fold the ext{8,16,32}[us] cases into {s}extract
  tcg/riscv64: Fold the ext{8,16,32}[us] cases into {s}extract
  tcg/riscv: Use SRAIW, SRLIW for {s}extract_i64
  tcg/s390x: Fold the ext{8,16,32}[us] cases into {s}extract
  tcg/sparc64: Use SRA, SRL for {s}extract_i64
  tcg/tci: Provide TCG_TARGET_{s}extract_valid
  tcg/tci: Remove assertions for deposit and extract
  tcg: Remove TCG_TARGET_HAS_{s}extract_{i32,i64}
  tcg: Remove TCG_TARGET_HAS_deposit_{i32,i64}
  tcg: Remove INDEX_op_ext{8,16,32}*
  tcg: Add all_outop[]
  tcg: Merge INDEX_op_mov_{i32,i64}
  tcg: Convert add to TCGOutOpBinary
  tcg: Merge INDEX_op_add_{i32,i64}
  tcg: Convert and to TCGOutOpBinary
  tcg: Merge INDEX_op_and_{i32,i64}
  tcg/optimize: Fold andc with immediate to and
  tcg/optimize: Emit add r,r,-1 in fold_setcond_tst_pow2
  tcg: Convert andc to TCGOutOpBinary
  tcg: Merge INDEX_op_andc_{i32,i64}
  tcg: Convert or to TCGOutOpBinary
  tcg: Merge INDEX_op_or_{i32,i64}
  tcg/optimize: Fold orc with immediate to or
  tcg: Convert orc to TCGOutOpBinary
  tcg: Merge INDEX_op_orc_{i32,i64}
  tcg: Convert xor to TCGOutOpBinary
  tcg: Merge INDEX_op_xor_{i32,i64}
  tcg/optimize: Fold eqv with immediate to xor
  tcg: Convert eqv to TCGOutOpBinary
  tcg: Merge INDEX_op_eqv_{i32,i64}
  tcg: Convert nand to TCGOutOpBinary
  tcg: Merge INDEX_op_nand_{i32,i64}
  tcg/loongarch64: Do not accept constant argument to nor
  tcg: Convert nor to TCGOutOpBinary
  tcg: Merge INDEX_op_nor_{i32,i64}
  tcg/arm: Fix constraints for sub
  tcg: Convert sub to TCGOutOpSubtract
  tcg: Merge INDEX_op_sub_{i32,i64}
  tcg: Convert neg to TCGOutOpUnary
  tcg: Merge INDEX_op_neg_{i32,i64}
  tcg: Convert not to TCGOutOpUnary
  tcg: Merge INDEX_op_not_{i32,i64}

 accel/tcg/internal-target.h                   |   1 +
 include/tcg/tcg-opc.h                         | 346 +++----
 include/tcg/tcg.h                             | 148 +--
 tcg/aarch64/tcg-target-has.h                  |  95 ++
 tcg/aarch64/tcg-target-mo.h                   |  12 +
 tcg/aarch64/tcg-target.h                      | 126 ---
 tcg/arm/tcg-target-con-set.h                  |   1 +
 tcg/arm/tcg-target-has.h                      |  90 ++
 tcg/arm/tcg-target-mo.h                       |  13 +
 tcg/arm/tcg-target.h                          |  86 --
 tcg/i386/tcg-target-con-set.h                 |   2 +-
 tcg/i386/tcg-target-has.h                     | 147 +++
 tcg/i386/tcg-target-mo.h                      |  19 +
 tcg/i386/tcg-target.h                         | 162 ----
 tcg/loongarch64/tcg-target-con-set.h          |   1 -
 tcg/loongarch64/tcg-target-con-str.h          |   1 -
 tcg/loongarch64/tcg-target-has.h              |  97 ++
 tcg/loongarch64/tcg-target-mo.h               |  12 +
 tcg/loongarch64/tcg-target.h                  | 115 ---
 tcg/mips/tcg-target-con-set.h                 |   1 -
 tcg/mips/tcg-target-has.h                     | 110 +++
 tcg/mips/tcg-target-mo.h                      |  13 +
 tcg/mips/tcg-target.h                         | 130 ---
 tcg/ppc/tcg-target-con-set.h                  |   3 +-
 tcg/ppc/tcg-target-has.h                      | 107 +++
 tcg/ppc/tcg-target-mo.h                       |  12 +
 tcg/ppc/tcg-target.h                          | 126 ---
 tcg/riscv/tcg-target-con-set.h                |   3 +-
 tcg/riscv/tcg-target-con-str.h                |   2 -
 tcg/riscv/tcg-target-has.h                    | 107 +++
 tcg/riscv/tcg-target-mo.h                     |  12 +
 tcg/riscv/tcg-target.h                        | 116 ---
 tcg/s390x/tcg-target-con-set.h                |   2 -
 tcg/s390x/tcg-target-has.h                    | 115 +++
 tcg/s390x/tcg-target-mo.h                     |  12 +
 tcg/s390x/tcg-target.h                        | 126 ---
 tcg/sparc64/tcg-target-con-set.h              |   1 +
 tcg/sparc64/tcg-target-has.h                  |  65 ++
 tcg/sparc64/tcg-target-mo.h                   |  12 +
 tcg/sparc64/tcg-target.h                      |  91 --
 tcg/tcg-has.h                                 |  89 ++
 tcg/tcg-internal.h                            |  18 +-
 tcg/tci/tcg-target-has.h                      |  59 ++
 tcg/tci/tcg-target-mo.h                       |  17 +
 tcg/tci/tcg-target.h                          |  94 --
 target/arm/tcg/translate-a64.c                |  10 +-
 target/arm/tcg/translate-sve.c                |  22 +-
 target/arm/tcg/translate.c                    |   2 +-
 target/sh4/translate.c                        |  20 +-
 target/tricore/translate.c                    |   4 +-
 tcg/optimize.c                                | 316 +++---
 tcg/tcg-common.c                              |   5 +-
 tcg/tcg-op-gvec.c                             |   1 +
 tcg/tcg-op-ldst.c                             |  29 +-
 tcg/tcg-op-vec.c                              |   9 +-
 tcg/tcg-op.c                                  | 665 +++++--------
 tcg/tcg.c                                     | 904 ++++++++++++------
 tcg/tci.c                                     | 138 +--
 docs/devel/tcg-ops.rst                        |  29 +-
 target/i386/tcg/emit.c.inc                    |  14 +-
 ...{tcg-target.opc.h => tcg-target-opc.h.inc} |   4 +-
 tcg/aarch64/tcg-target.c.inc                  | 340 +++----
 ...{tcg-target.opc.h => tcg-target-opc.h.inc} |   6 +-
 tcg/arm/tcg-target.c.inc                      | 305 ++++--
 ...{tcg-target.opc.h => tcg-target-opc.h.inc} |  22 +-
 tcg/i386/tcg-target.c.inc                     | 384 +++++---
 ...{tcg-target.opc.h => tcg-target-opc.h.inc} |   0
 tcg/loongarch64/tcg-target.c.inc              | 370 +++----
 tcg/mips/tcg-target-opc.h.inc                 |   1 +
 tcg/mips/tcg-target.c.inc                     | 318 +++---
 ...{tcg-target.opc.h => tcg-target-opc.h.inc} |  12 +-
 tcg/ppc/tcg-target.c.inc                      | 394 ++++----
 ...{tcg-target.opc.h => tcg-target-opc.h.inc} |   0
 tcg/riscv/tcg-target.c.inc                    | 380 ++++----
 ...{tcg-target.opc.h => tcg-target-opc.h.inc} |   6 +-
 tcg/s390x/tcg-target.c.inc                    | 589 ++++++------
 tcg/sparc64/tcg-target-opc.h.inc              |   1 +
 tcg/sparc64/tcg-target.c.inc                  | 234 +++--
 tcg/tcg-ldst.c.inc                            |  65 --
 tcg/tcg-pool.c.inc                            | 162 ----
 tcg/tci/tcg-target-opc.h.inc                  |   4 +
 tcg/tci/tcg-target.c.inc                      | 341 ++++---
 82 files changed, 4631 insertions(+), 4392 deletions(-)
 create mode 100644 tcg/aarch64/tcg-target-has.h
 create mode 100644 tcg/aarch64/tcg-target-mo.h
 create mode 100644 tcg/arm/tcg-target-has.h
 create mode 100644 tcg/arm/tcg-target-mo.h
 create mode 100644 tcg/i386/tcg-target-has.h
 create mode 100644 tcg/i386/tcg-target-mo.h
 create mode 100644 tcg/loongarch64/tcg-target-has.h
 create mode 100644 tcg/loongarch64/tcg-target-mo.h
 create mode 100644 tcg/mips/tcg-target-has.h
 create mode 100644 tcg/mips/tcg-target-mo.h
 create mode 100644 tcg/ppc/tcg-target-has.h
 create mode 100644 tcg/ppc/tcg-target-mo.h
 create mode 100644 tcg/riscv/tcg-target-has.h
 create mode 100644 tcg/riscv/tcg-target-mo.h
 create mode 100644 tcg/s390x/tcg-target-has.h
 create mode 100644 tcg/s390x/tcg-target-mo.h
 create mode 100644 tcg/sparc64/tcg-target-has.h
 create mode 100644 tcg/sparc64/tcg-target-mo.h
 create mode 100644 tcg/tcg-has.h
 create mode 100644 tcg/tci/tcg-target-has.h
 create mode 100644 tcg/tci/tcg-target-mo.h
 rename tcg/aarch64/{tcg-target.opc.h => tcg-target-opc.h.inc} (82%)
 rename tcg/arm/{tcg-target.opc.h => tcg-target-opc.h.inc} (75%)
 rename tcg/i386/{tcg-target.opc.h => tcg-target-opc.h.inc} (72%)
 rename tcg/loongarch64/{tcg-target.opc.h => tcg-target-opc.h.inc} (100%)
 create mode 100644 tcg/mips/tcg-target-opc.h.inc
 rename tcg/ppc/{tcg-target.opc.h => tcg-target-opc.h.inc} (83%)
 rename tcg/riscv/{tcg-target.opc.h => tcg-target-opc.h.inc} (100%)
 rename tcg/s390x/{tcg-target.opc.h => tcg-target-opc.h.inc} (75%)
 create mode 100644 tcg/sparc64/tcg-target-opc.h.inc
 delete mode 100644 tcg/tcg-ldst.c.inc
 delete mode 100644 tcg/tcg-pool.c.inc
 create mode 100644 tcg/tci/tcg-target-opc.h.inc