| Message ID | 20250206095253.928308-1-jamin_lin@aspeedtech.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | INTC model cleanup | expand |
Hi Cedric, Andrew > -----Original Message----- > From: Jamin Lin <jamin_lin@aspeedtech.com> > Sent: Thursday, February 6, 2025 5:53 PM > To: Cédric Le Goater <clg@kaod.org>; Peter Maydell > <peter.maydell@linaro.org>; Steven Lee <steven_lee@aspeedtech.com>; Troy > Lee <leetroy@gmail.com>; Andrew Jeffery <andrew@codeconstruct.com.au>; > Joel Stanley <joel@jms.id.au>; open list:ASPEED BMCs > <qemu-arm@nongnu.org>; open list:All patches CC here > <qemu-devel@nongnu.org> > Cc: Jamin Lin <jamin_lin@aspeedtech.com>; Troy Lee > <troy_lee@aspeedtech.com>; Yunlin Tang <yunlin.tang@aspeedtech.com> > Subject: [PATCH v2 0/6] INTC model cleanup > > v2: > To streamline the review process, split the following patch series into > three parts. > > https://patchwork.kernel.org/project/qemu-devel/cover/20250121070424.246 > 5942-1-jamin_lin@aspeedtech.com/ > This patch series focuses on cleaning up the INTC model to > facilitate future support for the INTC_IO model. > > Jamin Lin (6): > hw/intc/aspeed: Support setting different memory and register size > hw/intc/aspeed: Introduce helper functions for enable and status > registers > hw/intc/aspeed: Add object type name to trace events for better > debugging > hw/arm/aspeed: Rename IRQ table and machine name for AST2700 A0 > hw/arm/aspeed_ast27x0: Sort the IRQ table by IRQ number > hw/intc/aspeed: Support different memory region ops > > hw/arm/aspeed.c | 8 +- > hw/arm/aspeed_ast27x0.c | 58 ++++----- > hw/intc/aspeed_intc.c | 227 ++++++++++++++++++++-------------- > hw/intc/trace-events | 24 ++-- > include/hw/intc/aspeed_intc.h | 5 + > 5 files changed, 183 insertions(+), 139 deletions(-) > Please ignore the v2 patch. I will resend the v3 patch, as I am retaining the INTC naming and introducing a new INTC_IO model to support the AST2700 A1. So, I think I don't need to split 3 part patches to support AST2700 A1. Sorry for your inconvenience. Do you have any suggestion or concern? Jamin > -- > 2.34.1
Hello Jamin, On 2/10/25 02:46, Jamin Lin wrote: > Hi Cedric, Andrew > >> -----Original Message----- >> From: Jamin Lin <jamin_lin@aspeedtech.com> >> Sent: Thursday, February 6, 2025 5:53 PM >> To: Cédric Le Goater <clg@kaod.org>; Peter Maydell >> <peter.maydell@linaro.org>; Steven Lee <steven_lee@aspeedtech.com>; Troy >> Lee <leetroy@gmail.com>; Andrew Jeffery <andrew@codeconstruct.com.au>; >> Joel Stanley <joel@jms.id.au>; open list:ASPEED BMCs >> <qemu-arm@nongnu.org>; open list:All patches CC here >> <qemu-devel@nongnu.org> >> Cc: Jamin Lin <jamin_lin@aspeedtech.com>; Troy Lee >> <troy_lee@aspeedtech.com>; Yunlin Tang <yunlin.tang@aspeedtech.com> >> Subject: [PATCH v2 0/6] INTC model cleanup >> >> v2: >> To streamline the review process, split the following patch series into >> three parts. >> >> https://patchwork.kernel.org/project/qemu-devel/cover/20250121070424.246 >> 5942-1-jamin_lin@aspeedtech.com/ >> This patch series focuses on cleaning up the INTC model to >> facilitate future support for the INTC_IO model. >> >> Jamin Lin (6): >> hw/intc/aspeed: Support setting different memory and register size >> hw/intc/aspeed: Introduce helper functions for enable and status >> registers >> hw/intc/aspeed: Add object type name to trace events for better >> debugging >> hw/arm/aspeed: Rename IRQ table and machine name for AST2700 A0 >> hw/arm/aspeed_ast27x0: Sort the IRQ table by IRQ number >> hw/intc/aspeed: Support different memory region ops >> >> hw/arm/aspeed.c | 8 +- >> hw/arm/aspeed_ast27x0.c | 58 ++++----- >> hw/intc/aspeed_intc.c | 227 ++++++++++++++++++++-------------- >> hw/intc/trace-events | 24 ++-- >> include/hw/intc/aspeed_intc.h | 5 + >> 5 files changed, 183 insertions(+), 139 deletions(-) >> > > Please ignore the v2 patch. > I will resend the v3 patch, as I am retaining the INTC naming and introducing a new INTC_IO model to support the AST2700 A1. > So, I think I don't need to split 3 part patches to support AST2700 A1. > Sorry for your inconvenience. > Do you have any suggestion or concern? none. Please resend as well as the hace series if possible. these 2 series are easy to review and merge. Thanks, C.
v2: To streamline the review process, split the following patch series into three parts. https://patchwork.kernel.org/project/qemu-devel/cover/20250121070424.2465942-1-jamin_lin@aspeedtech.com/ This patch series focuses on cleaning up the INTC model to facilitate future support for the INTC_IO model. Jamin Lin (6): hw/intc/aspeed: Support setting different memory and register size hw/intc/aspeed: Introduce helper functions for enable and status registers hw/intc/aspeed: Add object type name to trace events for better debugging hw/arm/aspeed: Rename IRQ table and machine name for AST2700 A0 hw/arm/aspeed_ast27x0: Sort the IRQ table by IRQ number hw/intc/aspeed: Support different memory region ops hw/arm/aspeed.c | 8 +- hw/arm/aspeed_ast27x0.c | 58 ++++----- hw/intc/aspeed_intc.c | 227 ++++++++++++++++++++-------------- hw/intc/trace-events | 24 ++-- include/hw/intc/aspeed_intc.h | 5 + 5 files changed, 183 insertions(+), 139 deletions(-)