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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-439b037214asm101447705e9.38.2025.02.24.03.15.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Feb 2025 03:15:25 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH v2 00/12] fpu: Remove remaining target ifdefs and build only once Date: Mon, 24 Feb 2025 11:15:12 +0000 Message-ID: <20250224111524.1101196-1-peter.maydell@linaro.org> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This is version 2 of the series that removes all the target ifdefs from fpu/ and switches it to being built only once rather than once per target. The ifdefs are all either (1) floatx80 behaviours or (2) simple optimizations to take a decision at compiletime which we already have the mechanism to do at runtime. Tested with 'make check-tcg' and 'make check-functional'; the series is supposed to not have any behaviour changes. Changes v1->v2: * Split the old patches 4 and 5 so each has a patch which only adds the float_status argument to floatx80_is_infinity() or floatx80_invalid_encoding(), followed by a smaller patch which makes the real behaviour change * Updated the comments in the m68k_denormal patch as per review discussion Since the old patches 4 and 5 were both reviewed in their unsplit form and I have confirmed that the splitting didn't accidentally produce any change in the code, I have retained both RTH's and Philippe's reviewed-by tags on all the post-split patches. So I think we can consider this series as fully reviewed. Does anybody have any preference for which tree it goes in by? I can probably throw it in to target-arm.next if nobody has a better suggestion. thanks -- PMM Peter Maydell (12): fpu: Make targets specify floatx80 default Inf at runtime target/m68k: Avoid using floatx80_infinity global const target/i386: Avoid using floatx80_infinity global const fpu: Pass float_status to floatx80_is_infinity() fpu: Make targets specify whether floatx80 Inf can have Int bit clear fpu: Pass float_status to floatx80_invalid_encoding() fpu: Make floatx80 invalid encoding settable at runtime fpu: Move m68k_denormal fmt flag into floatx80_behaviour fpu: Always decide no_signaling_nans() at runtime fpu: Always decide snan_bit_is_one() at runtime fpu: Don't compile-time disable hardfloat for PPC targets fpu: Build only once include/fpu/softfloat-helpers.h | 12 +++++ include/fpu/softfloat-types.h | 51 ++++++++++++++++++ include/fpu/softfloat.h | 91 ++++++++++++++++++--------------- fpu/softfloat.c | 23 +++------ target/hppa/fpu_helper.c | 1 + target/i386/tcg/fpu_helper.c | 51 +++++++++--------- target/m68k/cpu.c | 35 +++++++++++++ target/m68k/fpu_helper.c | 2 +- target/m68k/softfloat.c | 47 ++++++----------- target/sh4/cpu.c | 1 + fpu/softfloat-parts.c.inc | 27 ++++++++-- fpu/softfloat-specialize.c.inc | 29 ++++------- fpu/meson.build | 2 +- 13 files changed, 236 insertions(+), 136 deletions(-)