Show patches with: Submitter = Palmer Dabbelt       |    State = Action Required       |   724 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[PULL,3/4] target/riscv: Fix sfence.vm/a both available in any priv version [PR,RFC] RISC-V Patches for 3.1-rc2 - 1 - --- 2018-11-13 Palmer Dabbelt New
[PULL,2/4] target/riscv: Fix FCLASS_D being treated as RV64 only [PR,RFC] RISC-V Patches for 3.1-rc2 - 1 - --- 2018-11-13 Palmer Dabbelt New
[PULL,1/4] hw/riscv/virt: Free the test device tree node name [PULL,1/4] hw/riscv/virt: Free the test device tree node name - - - --- 2018-11-13 Palmer Dabbelt New
[PR,RFC] RISC-V Patches for 3.1-rc2 [PR,RFC] RISC-V Patches for 3.1-rc2 - - - --- 2018-11-13 Palmer Dabbelt New
[for,3.1] RISC-V: Respect fences for user-only emulators [for,3.1] RISC-V: Respect fences for user-only emulators - 2 - --- 2018-11-09 Palmer Dabbelt New
[PULL] riscv: spike: Fix memory leak in the board init [PULL] riscv: spike: Fix memory leak in the board init - 2 - --- 2018-11-08 Palmer Dabbelt New
[PULL] A Single RISC-V Patch for 3.1-rc1 [PULL] A Single RISC-V Patch for 3.1-rc1 - - - --- 2018-11-08 Palmer Dabbelt New
[PULL,3/3] Add qemu-riscv@nongnu.org as the RISC-V list [PULL] RISC-V Patches for the 3.1 Soft Freeze, Part 2 - 2 1 --- 2018-11-01 Palmer Dabbelt New
[PULL,2/3] Add Alistair as a RISC-V Maintainer [PULL] RISC-V Patches for the 3.1 Soft Freeze, Part 2 - - - --- 2018-11-01 Palmer Dabbelt New
[PULL,1/3] target/riscv/pmp.c: pmpcfg_csr_read returns bogus value on RV64 [PULL,1/3] target/riscv/pmp.c: pmpcfg_csr_read returns bogus value on RV64 - 2 - --- 2018-11-01 Palmer Dabbelt New
[PULL] RISC-V Patches for the 3.1 Soft Freeze, Part 2 [PULL] RISC-V Patches for the 3.1 Soft Freeze, Part 2 - - - --- 2018-11-01 Palmer Dabbelt New
[PULL,3/3] Add qemu-riscv@nongnu.org as the RISC-V list [PULL,1/3] target/riscv/pmp.c: pmpcfg_csr_read returns bogus value on RV64 - 2 1 --- 2018-10-30 Palmer Dabbelt New
[PULL,2/3] Add Alistair as a RISC-V Maintainer [PULL,1/3] target/riscv/pmp.c: pmpcfg_csr_read returns bogus value on RV64 - - - --- 2018-10-30 Palmer Dabbelt New
[PULL,1/3] target/riscv/pmp.c: pmpcfg_csr_read returns bogus value on RV64 [PULL,1/3] target/riscv/pmp.c: pmpcfg_csr_read returns bogus value on RV64 - 2 - --- 2018-10-30 Palmer Dabbelt New
[PR,RFC] RISC-V Patches for the 3.1 Soft Freeze, Part 2 [PR,RFC] RISC-V Patches for the 3.1 Soft Freeze, Part 2 - - - --- 2018-10-30 Palmer Dabbelt New
Add qemu-riscv@nongnu.org as the RISC-V list Add qemu-riscv@nongnu.org as the RISC-V list - 2 1 --- 2018-10-30 Palmer Dabbelt New
Add Alistair as a RISC-V Maintainer Add Alistair as a RISC-V Maintainer - 2 - --- 2018-10-29 Palmer Dabbelt New
[PULL,5/5] RISC-V: Don't add NULL bootargs to device-tree [PULL,1/5] RISC-V: Allow setting and clearing multiple irqs - 3 - --- 2018-10-17 Palmer Dabbelt New
[PULL,4/5] RISC-V: Add missing free for plic_hart_config [PULL,1/5] RISC-V: Allow setting and clearing multiple irqs - 3 - --- 2018-10-17 Palmer Dabbelt New
[PULL,3/5] RISC-V: Update CSR and interrupt definitions [PULL,1/5] RISC-V: Allow setting and clearing multiple irqs - 2 - --- 2018-10-17 Palmer Dabbelt New
[PULL,2/5] RISC-V: Move non-ops from op_helper to cpu_helper [PULL,1/5] RISC-V: Allow setting and clearing multiple irqs - 3 - --- 2018-10-17 Palmer Dabbelt New
[PULL,1/5] RISC-V: Allow setting and clearing multiple irqs [PULL,1/5] RISC-V: Allow setting and clearing multiple irqs - 2 - --- 2018-10-17 Palmer Dabbelt New
[PULL] First RISC-V Patch Set for the 3.1 Soft Freeze [PULL] First RISC-V Patch Set for the 3.1 Soft Freeze - - - --- 2018-10-17 Palmer Dabbelt New
linux-user: Implement renameat2 when defined - - - --- 2017-12-20 Palmer Dabbelt New
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