Show patches with: Series = support vector extension v1.0       |   78 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[v8,78/78] target/riscv: rvv-1.0: update opivv_vadc_check() comment support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,77/78] target/riscv: rvv-1.0: rename vmandnot.mm and vmornot.mm to vmandn.mm and vmorn.mm support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,76/78] target/riscv: rvv-1.0: add vector unit-stride mask load/store insns support vector extension v1.0 - - - --- 2021-10-15 Frank Chang New
[v8,75/78] target/riscv: rvv-1.0: add evl parameter to vext_ldst_us() support vector extension v1.0 - - - --- 2021-10-15 Frank Chang New
[v8,74/78] target/riscv: rvv-1.0: add vsetivli instruction support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,73/78] target/riscv: rvv-1.0: rename r2_zimm to r2_zimm11 support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,72/78] target/riscv: set mstatus.SD bit when writing fp CSRs support vector extension v1.0 - - - --- 2021-10-15 Frank Chang New
[v8,71/78] target/riscv: rvv-1.0: floating-point reciprocal estimate instruction support vector extension v1.0 - - - --- 2021-10-15 Frank Chang New
[v8,70/78] target/riscv: rvv-1.0: floating-point reciprocal square-root estimate instruction support vector extension v1.0 - - - --- 2021-10-15 Frank Chang New
[v8,69/78] target/riscv: gdb: support vector registers for rv64 & rv32 support vector extension v1.0 - - - --- 2021-10-15 Frank Chang New
[v8,68/78] target/riscv: rvv-1.0: set mstatus.SD bit when writing vector CSRs support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,67/78] target/riscv: rvv-1.0: trigger illegal instruction exception if frm is not valid support vector extension v1.0 - - - --- 2021-10-15 Frank Chang New
[v8,66/78] target/riscv: rvv-1.0: implement vstart CSR support vector extension v1.0 - - - --- 2021-10-15 Frank Chang New
[v8,65/78] target/riscv: rvv-1.0: relax RV_VLEN_MAX to 1024-bits support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,64/78] target/riscv: rvv-1.0: narrowing floating-point/integer type-convert support vector extension v1.0 1 - - --- 2021-10-15 Frank Chang New
[v8,63/78] target/riscv: add "set round to odd" rounding mode helper function support vector extension v1.0 1 - - --- 2021-10-15 Frank Chang New
[v8,62/78] target/riscv: rvv-1.0: widening floating-point/integer type-convert support vector extension v1.0 1 - - --- 2021-10-15 Frank Chang New
[v8,61/78] target/riscv: rvv-1.0: floating-point/integer type-convert instructions support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,60/78] target/riscv: introduce floating-point rounding mode enum support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,59/78] target/riscv: rvv-1.0: floating-point min/max instructions support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,58/78] target/riscv: rvv-1.0: remove integer extract instruction support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,57/78] target/riscv: rvv-1.0: remove vmford.vv and vmford.vf support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,56/78] target/riscv: rvv-1.0: remove widening saturating scaled multiply-add support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,55/78] target/riscv: rvv-1.0: single-width scaling shift instructions support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,54/78] target/riscv: rvv-1.0: widening floating-point reduction instructions support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,53/78] target/riscv: rvv-1.0: single-width floating-point reduction support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,52/78] target/riscv: rvv-1.0: narrowing fixed-point clip instructions support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,51/78] target/riscv: rvv-1.0: floating-point slide instructions support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,50/78] target/riscv: rvv-1.0: slide instructions support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,49/78] target/riscv: rvv-1.0: mask-register logical instructions support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,48/78] target/riscv: rvv-1.0: floating-point compare instructions support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,47/78] target/riscv: rvv-1.0: integer comparison instructions support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,46/78] target/riscv: rvv-1.0: single-width saturating add and subtract instructions support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,45/78] target/riscv: rvv-1.0: widening integer multiply-add instructions support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,44/78] target/riscv: rvv-1.0: narrowing integer right shift instructions support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,43/78] target/riscv: rvv-1.0: integer add-with-carry/subtract-with-borrow support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,42/78] target/riscv: rvv-1.0: single-width bit shift instructions support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,41/78] target/riscv: rvv-1.0: single-width averaging add and subtract instructions support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,40/78] target/riscv: rvv-1.0: integer extension instructions support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,39/78] target/riscv: rvv-1.0: whole register move instructions support vector extension v1.0 1 - - --- 2021-10-15 Frank Chang New
[v8,38/78] target/riscv: rvv-1.0: floating-point scalar move instructions support vector extension v1.0 1 - - --- 2021-10-15 Frank Chang New
[v8,37/78] target/riscv: rvv-1.0: floating-point move instruction support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,36/78] target/riscv: rvv-1.0: integer scalar move instructions support vector extension v1.0 1 1 - --- 2021-10-15 Frank Chang New
[v8,35/78] target/riscv: rvv-1.0: register gather instructions support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,34/78] target/riscv: rvv-1.0: allow load element with sign-extended support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,33/78] target/riscv: rvv-1.0: element index instruction support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,32/78] target/riscv: rvv-1.0: iota instruction support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,31/78] target/riscv: rvv-1.0: set-X-first mask bit instructions support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,30/78] target/riscv: rvv-1.0: find-first-set mask bit instruction support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[29/76] target/riscv: rvv-1.0: mask population count instruction support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,28/78] target/riscv: rvv-1.0: floating-point classify instructions support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,27/78] target/riscv: rvv-1.0: floating-point square-root instruction support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,26/78] target/riscv: rvv-1.0: take fractional LMUL into vector max elements calculation support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,25/78] target/riscv: rvv-1.0: update vext_max_elems() for load/store insns support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,24/78] target/riscv: rvv-1.0: load/store whole register instructions support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[23/76] target/riscv: rvv-1.0: amo operations support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,22/78] target/riscv: rvv-1.0: fix address index overflow bug of indexed load/store insns support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[21/76] target/riscv: rvv-1.0: fix address index overflow bug of indexed load/store insns support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,20/78] target/riscv: rvv-1.0: stride load and store instructions support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[19/76] target/riscv: rvv-1.0: stride load and store instructions support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[18/76] target/riscv: rvv-1.0: configure instructions support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,17/78] target/riscv: rvv:1.0: add translation-time nan-box helper function support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,16/78] target/riscv: introduce more imm value modes in translator functions support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,15/78] target/riscv: rvv-1.0: update check functions support vector extension v1.0 - 1 - --- 2021-10-15 Frank Chang New
[v8,14/78] target/riscv: rvv-1.0: add VMA and VTA support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,13/78] target/riscv: rvv-1.0: add fractional LMUL support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,12/78] target/riscv: rvv-1.0: remove MLEN calculations support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,11/78] target/riscv: rvv-1.0: check MSTATUS_VS when accessing vector csr registers support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,10/78] target/riscv: rvv-1.0: add vlenb register support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,09/78] target/riscv: rvv-1.0: add vcsr register support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,08/78] target/riscv: rvv-1.0: remove rvv related codes from fcsr registers support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,07/78] target/riscv: rvv-1.0: add translation-time vector context status support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,06/78] target/riscv: rvv-1.0: introduce writable misa.v field support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,05/78] target/riscv: rvv-1.0: add sstatus VS field support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,04/78] target/riscv: rvv-1.0: add mstatus VS field support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,03/78] target/riscv: Use FIELD_EX32() to extract wd field support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,02/78] target/riscv: drop vector 0.7.1 and add 1.0 support support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New
[v8,01/78] target/riscv: fix TB_FLAGS bits overlapping bug for rvv/rvh support vector extension v1.0 - 2 - --- 2021-10-15 Frank Chang New