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[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
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Apply
Patch
Series
A/R/T
S/W/F
Date
Submitter
Delegate
State
[PULL,v3,35/35] bsd-user: Add RISC-V 64-bit Target Configuration and Debug XML Files
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,34/35] bsd-user: Implement set_mcontext and get_ucontext_sigreturn for RISCV
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,33/35] bsd-user: Implement 'get_mcontext' for RISC-V
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,32/35] bsd-user: Implement RISC-V signal trampoline setup functions
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,31/35] bsd-user: Define RISC-V signal handling structures and constants
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,30/35] bsd-user: Add generic RISC-V64 target definitions
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,29/35] bsd-user: Define RISC-V system call structures and constants
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,28/35] bsd-user: Define RISC-V VM parameters and helper functions
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,27/35] bsd-user: Add RISC-V thread setup and initialization support
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,26/35] bsd-user: Implement RISC-V sysarch system call emulation
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,25/35] bsd-user: Add RISC-V signal trampoline setup function
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,24/35] bsd-user: Define RISC-V register structures and register copying
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,23/35] bsd-user: Add RISC-V ELF definitions and hardware capability detection
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,22/35] bsd-user: Implement RISC-V TLS register setup
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,21/35] bsd-user: Implement RISC-V CPU register cloning and reset functions
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,20/35] bsd-user: Add RISC-V CPU execution loop and syscall handling
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,19/35] bsd-user: Implement RISC-V CPU initialization and main loop
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,18/35] hw/intc: riscv-imsic: Fix interrupt state updates.
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,17/35] target/riscv/cpu_helper: Fix linking problem with semihosting disabled
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,16/35] target/riscv32: Fix masking of physical address
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 2 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,15/35] target: riscv: Add Svvptc extension support
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,14/35] hw/riscv: Respect firmware ELF entry point
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,13/35] target/riscv: Add textra matching condition for the triggers
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,12/35] target/riscv: Preliminary textra trigger CSR writting support
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,11/35] util/util/cpuinfo-riscv.c: fix riscv64 build on musl libc
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,10/35] target/riscv/cpu.c: Add 'fcsr' register to QEMU log as a part of F extension
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 2 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,09/35] target/riscv: Stop timer with infinite timecmp
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,08/35] target/riscv/kvm: Fix the group bit setting of AIA
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,07/35] target: riscv: Enable Bit Manip for OpenTitan Ibex CPU
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,06/35] target/riscv: fix za64rs enabling
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 2 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,05/35] target/riscv/tcg/tcg-cpu.c: consider MISA bit choice in implied rule
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,04/35] tests/acpi: Add expected ACPI SRAT AML file for RISC-V
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
1 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,03/35] tests/qtest/bios-tables-test.c: Enable numamem testing for RISC-V
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
1 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,02/35] tests/acpi: Add empty ACPI SRAT data file for RISC-V
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
1 1 -
-
-
-
2024-10-02
Alistair Francis
New
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
[PULL,v3,01/35] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-10-02
Alistair Francis
New