Show patches with: Submitter = Weiwei Li       |   599 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[1/1] MAINTAINERS: update mail address for Weiwei Li [1/1] MAINTAINERS: update mail address for Weiwei Li - 4 - --- 2023-10-30 Weiwei Li New
[v2] target/riscv: Update CSR bits name for svadu extension [v2] target/riscv: Update CSR bits name for svadu extension - 1 - --- 2023-08-16 Weiwei Li New
target/riscv: Update CSR bits name for svadu extension target/riscv: Update CSR bits name for svadu extension - - - --- 2023-08-15 Weiwei Li New
[v3,1/1] target/riscv: Add disas support for BF16 extensions target/riscv: Add support for BF16 extensions 1 - - --- 2023-07-03 Weiwei Li New
[v2,6/6] target/riscv: Add disas support for BF16 extensions target/riscv: Add support for BF16 extensions - - - --- 2023-06-15 Weiwei Li New
[v2,5/6] target/riscv: Expose properties for BF16 extensions target/riscv: Add support for BF16 extensions - 1 - --- 2023-06-15 Weiwei Li New
[v2,4/6] target/riscv: Add support for Zvfbfwma extension target/riscv: Add support for BF16 extensions - 1 - --- 2023-06-15 Weiwei Li New
[v2,3/6] target/riscv: Add support for Zvfbfmin extension target/riscv: Add support for BF16 extensions - 1 - --- 2023-06-15 Weiwei Li New
[v2,2/6] target/riscv: Add support for Zfbfmin extension target/riscv: Add support for BF16 extensions - 1 - --- 2023-06-15 Weiwei Li New
[v2,1/6] target/riscv: Add properties for BF16 extensions target/riscv: Add support for BF16 extensions 1 1 - --- 2023-06-15 Weiwei Li New
[2/2] target/riscv: update cur_pmbase/pmmask based on mode affected by MPRV target/riscv: Fix the xlen for data address when MPRV=1 - 1 - --- 2023-06-14 Weiwei Li New
[1/2] target/riscv: Add additional xlen for address when MPRV=1 target/riscv: Fix the xlen for data address when MPRV=1 - 1 - --- 2023-06-14 Weiwei Li New
target/riscv: Fix initialized value for cur_pmmask target/riscv: Fix initialized value for cur_pmmask - 1 - --- 2023-06-10 Weiwei Li New
[v2,3/3] target/riscv: Remove redundant assignment to SXL target/riscv: Fix mstatus related problems - 2 - --- 2023-06-03 Weiwei Li New
[v2,2/3] target/riscv: Support MSTATUS.MPV/GVA only when RVH is enabled target/riscv: Fix mstatus related problems - 2 - --- 2023-06-03 Weiwei Li New
[v2,1/3] target/riscv: Make MPV only work when MPP != PRV_M target/riscv: Fix mstatus related problems - 2 - --- 2023-06-03 Weiwei Li New
[4/4] target/riscv: Remove redundant assignment to SXL target/riscv: Fix mstatus related problems - 3 - --- 2023-05-29 Weiwei Li New
[3/4] target/riscv: Support MSTATUS.MPV/GVA only when RVH is enabled target/riscv: Fix mstatus related problems - 2 - --- 2023-05-29 Weiwei Li New
[2/4] target/riscv: Remove check on mode for MPRV target/riscv: Fix mstatus related problems - 1 - --- 2023-05-29 Weiwei Li New
[1/4] target/riscv: Make MPV only work when MPP != PRV_M target/riscv: Fix mstatus related problems - 3 - --- 2023-05-29 Weiwei Li New
[v3,7/7] target/riscv: Remove pc_succ_insn from DisasContext target/riscv: Add support for PC-relative translation - 2 - --- 2023-05-26 Weiwei Li New
[v3,6/7] target/riscv: Enable PC-relative translation target/riscv: Add support for PC-relative translation - 2 - --- 2023-05-26 Weiwei Li New
[v3,5/7] target/riscv: Use true diff for gen_pc_plus_diff target/riscv: Add support for PC-relative translation - 2 - --- 2023-05-26 Weiwei Li New
[v3,4/7] target/riscv: Change gen_set_pc_imm to gen_update_pc target/riscv: Add support for PC-relative translation - 2 - --- 2023-05-26 Weiwei Li New
[v3,3/7] target/riscv: Change gen_goto_tb to work on displacements target/riscv: Add support for PC-relative translation - 2 - --- 2023-05-26 Weiwei Li New
[v3,2/7] target/riscv: Introduce cur_insn_len into DisasContext target/riscv: Add support for PC-relative translation - 2 - --- 2023-05-26 Weiwei Li New
[v3,1/7] target/riscv: Fix target address to update badaddr target/riscv: Add support for PC-relative translation - 2 - --- 2023-05-26 Weiwei Li New
[v7,2/2] target/riscv: Update cur_pmmask/base when xl changes target/riscv: Fix pointer mask related support - 1 - --- 2023-05-24 Weiwei Li New
[v7,1/2] target/riscv: Fix pointer mask transformation for vector address target/riscv: Fix pointer mask related support - 2 - --- 2023-05-24 Weiwei Li New
[v2,7/7] target/riscv: Remove pc_succ_insn from DisasContext target/riscv: Add support for PC-relative translation - 2 - --- 2023-05-23 Weiwei Li New
[v2,6/7] target/riscv: Enable PC-relative translation target/riscv: Add support for PC-relative translation - 2 - --- 2023-05-23 Weiwei Li New
[v2,5/7] target/riscv: Use true diff for gen_pc_plus_diff target/riscv: Add support for PC-relative translation - 2 - --- 2023-05-23 Weiwei Li New
[v2,4/7] target/riscv: Change gen_set_pc_imm to gen_update_pc target/riscv: Add support for PC-relative translation - 2 - --- 2023-05-23 Weiwei Li New
[v2,3/7] target/riscv: Change gen_goto_tb to work on displacements target/riscv: Add support for PC-relative translation - 2 - --- 2023-05-23 Weiwei Li New
[v2,2/7] target/riscv: Introduce cur_insn_len into DisasContext target/riscv: Add support for PC-relative translation - 2 - --- 2023-05-23 Weiwei Li New
[v2,1/7] target/riscv: Fix target address to update badaddr target/riscv: Add support for PC-relative translation - 2 - --- 2023-05-23 Weiwei Li New
[v2,8/8] disas/riscv.c: Remove redundant parentheses Add support for extension specific disas 1 1 - --- 2023-05-23 Weiwei Li New
[v2,7/8] disas/riscv.c: Fix lines with over 80 characters Add support for extension specific disas 1 1 - --- 2023-05-23 Weiwei Li New
[v2,6/8] disas/riscv.c: Remove unused decomp_rv32/64 value for vector instructions Add support for extension specific disas 1 1 - --- 2023-05-23 Weiwei Li New
[v2,5/8] disas/riscv.c: Support disas for Z*inx extensions Add support for extension specific disas - 2 - --- 2023-05-23 Weiwei Li New
[v2,4/8] disas/riscv.c: Support disas for Zcm* extensions Add support for extension specific disas - 2 - --- 2023-05-23 Weiwei Li New
[v2,3/8] target/riscv: Pass RISCVCPUConfig as target_info to disassemble_info Add support for extension specific disas - 2 - --- 2023-05-23 Weiwei Li New
[v2,2/8] target/riscv: Split RISCVCPUConfig declarations from cpu.h into cpu_cfg.h Add support for extension specific disas - 2 - --- 2023-05-23 Weiwei Li New
[v2,1/8] disas: Change type of disassemble_info.target_info to pointer Add support for extension specific disas - 2 - --- 2023-05-23 Weiwei Li New
[7/7] disas/riscv.c: Remove redundant parentheses Add support for extension specific disas - 1 - --- 2023-05-19 Weiwei Li New
[6/7] disas/riscv.c: Fix lines with over 80 characters Add support for extension specific disas - 1 - --- 2023-05-19 Weiwei Li New
[5/7] disas/riscv.c: Remove unused decomp_rv32/64 value for vector instructions Add support for extension specific disas - 1 - --- 2023-05-19 Weiwei Li New
[4/7] disas/riscv.c: Support disas for Z*inx extensions Add support for extension specific disas - 1 - --- 2023-05-19 Weiwei Li New
[3/7] disas/riscv.c: Support disas for Zcm* extensions Add support for extension specific disas - 1 - --- 2023-05-19 Weiwei Li New
[2/7] target/riscv: Pass RISCVCPUConfig as target_info to disassemble_info Add support for extension specific disas - 1 - --- 2023-05-19 Weiwei Li New
[1/7] disas: Change type of disassemble_info.target_info to pointer Add support for extension specific disas - 1 - --- 2023-05-19 Weiwei Li New
[v6,12/12] target/riscv: Deny access if access is partially inside the PMP entry target/riscv: Fix PMP related problem - 1 - --- 2023-05-17 Weiwei Li New
[v6,11/12] target/riscv: Separate pmp_update_rule() in pmpcfg_csr_write target/riscv: Fix PMP related problem - 1 - --- 2023-05-17 Weiwei Li New
[v6,10/12] target/riscv: Flush TLB only when pmpcfg/pmpaddr really changes target/riscv: Fix PMP related problem - 2 - --- 2023-05-17 Weiwei Li New
[v6,09/12] target/riscv: Flush TLB when pmpaddr is updated target/riscv: Fix PMP related problem - 2 - --- 2023-05-17 Weiwei Li New
[v6,08/12] target/riscv: Update the next rule addr in pmpaddr_csr_write() target/riscv: Fix PMP related problem - 1 - --- 2023-05-17 Weiwei Li New
[v6,07/12] target/riscv: Flush TLB when MMWP or MML bits are changed target/riscv: Fix PMP related problem - 1 - --- 2023-05-17 Weiwei Li New
[v6,06/12] target/riscv: Remove unused paramters in pmp_hart_has_privs_default() target/riscv: Fix PMP related problem - 1 - --- 2023-05-17 Weiwei Li New
[v6,05/12] target/riscv: Make RLB/MML/MMWP bits writable only when Smepmp is enabled target/riscv: Fix PMP related problem - 1 - --- 2023-05-17 Weiwei Li New
[v6,04/12] target/riscv: Change the return type of pmp_hart_has_privs() to bool target/riscv: Fix PMP related problem - 1 - --- 2023-05-17 Weiwei Li New
[v6,03/12] target/riscv: Make the short cut really work in pmp_hart_has_privs target/riscv: Fix PMP related problem - 1 - --- 2023-05-17 Weiwei Li New
[v6,02/12] target/riscv: Move pmp_get_tlb_size apart from get_physical_address_pmp target/riscv: Fix PMP related problem - 2 - --- 2023-05-17 Weiwei Li New
[v6,01/12] target/riscv: Update pmp_get_tlb_size() target/riscv: Fix PMP related problem - 2 - --- 2023-05-17 Weiwei Li New
target/riscv: Move zc* out of the experimental properties target/riscv: Move zc* out of the experimental properties - 2 - --- 2023-05-10 Weiwei Li New
[v5,13/13] target/riscv: Deny access if access is partially inside the PMP entry target/riscv: Fix PMP related problem - 1 - --- 2023-04-28 Weiwei Li New
[v5,12/13] target/riscv: Separate pmp_update_rule() in pmpcfg_csr_write target/riscv: Fix PMP related problem - 1 - --- 2023-04-28 Weiwei Li New
[v5,11/13] accel/tcg: Uncache the host address for instruction fetch when tlb size < 1 target/riscv: Fix PMP related problem - 2 - --- 2023-04-28 Weiwei Li New
[v5,10/13] target/riscv: Flush TLB only when pmpcfg/pmpaddr really changes target/riscv: Fix PMP related problem - 2 - --- 2023-04-28 Weiwei Li New
[v5,09/13] target/riscv: Flush TLB when pmpaddr is updated target/riscv: Fix PMP related problem - 2 - --- 2023-04-28 Weiwei Li New
[v5,08/13] target/riscv: Update the next rule addr in pmpaddr_csr_write() target/riscv: Fix PMP related problem - 1 - --- 2023-04-28 Weiwei Li New
[v5,07/13] target/riscv: Flush TLB when MMWP or MML bits are changed target/riscv: Fix PMP related problem - 1 - --- 2023-04-28 Weiwei Li New
[v5,06/13] target/riscv: Remove unused paramters in pmp_hart_has_privs_default() target/riscv: Fix PMP related problem - 1 - --- 2023-04-28 Weiwei Li New
[v5,05/13] target/riscv: Make RLB/MML/MMWP bits writable only when Smepmp is enabled target/riscv: Fix PMP related problem - 1 - --- 2023-04-28 Weiwei Li New
[v5,04/13] target/riscv: Change the return type of pmp_hart_has_privs() to bool target/riscv: Fix PMP related problem - 1 - --- 2023-04-28 Weiwei Li New
[v5,03/13] target/riscv: Make the short cut really work in pmp_hart_has_privs target/riscv: Fix PMP related problem - 1 - --- 2023-04-28 Weiwei Li New
[v5,02/13] target/riscv: Move pmp_get_tlb_size apart from get_physical_address_pmp target/riscv: Fix PMP related problem - 2 - --- 2023-04-28 Weiwei Li New
[v5,01/13] target/riscv: Update pmp_get_tlb_size() target/riscv: Fix PMP related problem - 2 - --- 2023-04-28 Weiwei Li New
[v4,7/7] target/riscv: Separate pmp_update_rule() in pmpcfg_csr_write target/riscv: Fix PMP related problem - - - --- 2023-04-22 Weiwei Li New
[v4,6/7] target/riscv: Make the short cut really work in pmp_hart_has_privs target/riscv: Fix PMP related problem - - - --- 2023-04-22 Weiwei Li New
[v4,5/7] accel/tcg: Uncache the host address for instruction fetch when tlb size < 1 target/riscv: Fix PMP related problem - 2 - --- 2023-04-22 Weiwei Li New
[v4,4/7] target/riscv: Flush TLB only when pmpcfg/pmpaddr really changes target/riscv: Fix PMP related problem - 2 - --- 2023-04-22 Weiwei Li New
[v4,3/7] target/riscv: Flush TLB when pmpaddr is updated target/riscv: Fix PMP related problem - 2 - --- 2023-04-22 Weiwei Li New
[v4,2/7] target/riscv: Move pmp_get_tlb_size apart from get_physical_address_pmp target/riscv: Fix PMP related problem - 1 - --- 2023-04-22 Weiwei Li New
[v4,1/7] target/riscv: Update pmp_get_tlb_size() target/riscv: Fix PMP related problem - 1 - --- 2023-04-22 Weiwei Li New
[v3,7/7] target/riscv: Separate pmp_update_rule() in pmpcfg_csr_write target/riscv: Fix PMP related problem - - - --- 2023-04-19 Weiwei Li New
[v3,6/7] target/riscv: Make the short cut really work in pmp_hart_has_privs target/riscv: Fix PMP related problem - - - --- 2023-04-19 Weiwei Li New
[v3,5/7] accel/tcg: Uncache the host address for instruction fetch when tlb size < 1 target/riscv: Fix PMP related problem - 2 - --- 2023-04-19 Weiwei Li New
[v3,4/7] target/riscv: Flush TLB only when pmpcfg/pmpaddr really changes target/riscv: Fix PMP related problem - 2 - --- 2023-04-19 Weiwei Li New
[v3,3/7] target/riscv: Flush TLB when pmpaddr is updated target/riscv: Fix PMP related problem - 2 - --- 2023-04-19 Weiwei Li New
[v3,2/7] target/riscv: Move pmp_get_tlb_size apart from get_physical_address_pmp target/riscv: Fix PMP related problem - - - --- 2023-04-19 Weiwei Li New
[v3,1/7] target/riscv: Update pmp_get_tlb_size() target/riscv: Fix PMP related problem - - - --- 2023-04-19 Weiwei Li New
[v2,8/8] target/riscv: Separate pmp_update_rule() in pmpcfg_csr_write Use pmp_update_rule_addr() an… target/riscv: Fix PMP related problem - - - --- 2023-04-18 Weiwei Li New
[v2,7/8] target/riscv: Make the short cut really work in pmp_hart_has_privs target/riscv: Fix PMP related problem - - - --- 2023-04-18 Weiwei Li New
[v2,6/8] accel/tcg: Uncache the host address for instruction fetch when tlb size < 1 target/riscv: Fix PMP related problem - 2 - --- 2023-04-18 Weiwei Li New
[v2,5/8] target/riscv: flush tb when PMP entry changes target/riscv: Fix PMP related problem - - - --- 2023-04-18 Weiwei Li New
[v2,4/8] target/riscv: Flush TLB only when pmpcfg/pmpaddr really changes target/riscv: Fix PMP related problem - 1 - --- 2023-04-18 Weiwei Li New
[v2,3/8] target/riscv: flush tlb when pmpaddr is updated target/riscv: Fix PMP related problem - 1 - --- 2023-04-18 Weiwei Li New
[v2,2/8] target/riscv: Move pmp_get_tlb_size apart from get_physical_address_pmp target/riscv: Fix PMP related problem - - - --- 2023-04-18 Weiwei Li New
[v2,1/8] target/riscv: Update pmp_get_tlb_size() target/riscv: Fix PMP related problem - - - --- 2023-04-18 Weiwei Li New
[v2] target/riscv: Update check for Zca/Zcf/Zcd [v2] target/riscv: Update check for Zca/Zcf/Zcd - 1 - --- 2023-04-13 Weiwei Li New
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