Show patches with: State = Action Required       |    Archived = No       |   3075 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[10/61] target/arm: Use FPST_ZA for sme_fmopa_[hsd] target/arm: Implement FEAT_SME2 - - - --- 2025-02-06 Richard Henderson New
[09/61] target/arm: Introduce FPST_ZA, FPST_ZA_F16 target/arm: Implement FEAT_SME2 - - - --- 2025-02-06 Richard Henderson New
[08/61] tcg: Split out tcg_gen_gvec_{add,sub}_var target/arm: Implement FEAT_SME2 - - - --- 2025-02-06 Richard Henderson New
[07/61] tcg: Split out tcg_gen_gvec_mov_var target/arm: Implement FEAT_SME2 - - - --- 2025-02-06 Richard Henderson New
[06/61] tcg: Split out tcg_gen_gvec_3_var target/arm: Implement FEAT_SME2 - - - --- 2025-02-06 Richard Henderson New
[05/61] tcg: Split out tcg_gen_gvec_2_var target/arm: Implement FEAT_SME2 - - - --- 2025-02-06 Richard Henderson New
[04/61] tcg: Add base arguments to check_overlap_[234] target/arm: Implement FEAT_SME2 - - - --- 2025-02-06 Richard Henderson New
[03/61] tcg: Add dbase argument to expand_clr target/arm: Implement FEAT_SME2 - - - --- 2025-02-06 Richard Henderson New
[02/61] tcg: Add dbase argument to do_dup target/arm: Implement FEAT_SME2 - - - --- 2025-02-06 Richard Henderson New
[01/61] tcg: Add dbase argument to do_dup_store target/arm: Implement FEAT_SME2 - - - --- 2025-02-06 Richard Henderson New
[v1,1/1] xen: No need to flush the mapcache for grants xen: Remove invalidation of mapcache_grants on IOREQ_TYPE_INVALIDATE - 1 - --- 2025-02-06 Edgar E. Iglesias New
[v5,6/6] target/i386: Add support for EPYC-Turin model target/i386: Update EPYC CPU models for Cache property, RAS, SVM feature and add EPYC-Turin CPU mod… - 1 - --- 2025-02-06 Babu Moger New
[v5,5/6] target/i386: Update EPYC-Genoa for Cache property, perfmon-v2, RAS and SVM feature bits target/i386: Update EPYC CPU models for Cache property, RAS, SVM feature and add EPYC-Turin CPU mod… - 2 - --- 2025-02-06 Babu Moger New
[v5,4/6] target/i386: Add feature that indicates WRMSR to BASE reg is non-serializing target/i386: Update EPYC CPU models for Cache property, RAS, SVM feature and add EPYC-Turin CPU mod… - 2 - --- 2025-02-06 Babu Moger New
[v5,3/6] target/i386: Update EPYC-Milan CPU model for Cache property, RAS, SVM feature bits target/i386: Update EPYC CPU models for Cache property, RAS, SVM feature and add EPYC-Turin CPU mod… - 2 - --- 2025-02-06 Babu Moger New
[v5,2/6] target/i386: Update EPYC-Rome CPU model for Cache property, RAS, SVM feature bits target/i386: Update EPYC CPU models for Cache property, RAS, SVM feature and add EPYC-Turin CPU mod… - 2 - --- 2025-02-06 Babu Moger New
[v5,1/6] target/i386: Update EPYC CPU model for Cache property, RAS, SVM feature bits target/i386: Update EPYC CPU models for Cache property, RAS, SVM feature and add EPYC-Turin CPU mod… - 2 - --- 2025-02-06 Babu Moger New
[22/22] target/riscv: move SATP modes out of CPUConfig target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[21/22] target/riscv: remove .instance_post_init target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[20/22] target/riscv: convert Xiangshan Nanhu to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[19/22] target/riscv: convert Ventana V1 to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[18/22] target/riscv: convert TT Ascalon to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[17/22] target/riscv: convert TT C906 to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[16/22] target/riscv: generalize custom CSR functionality target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[15/22] target/riscv: th: make CSR insertion test a bit more intuitive target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[14/22] target/riscv: convert SiFive U models to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[13/22] target/riscv: convert ibex CPU models to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[12/22] target/riscv: convert SiFive E CPU models to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[11/22] target/riscv: convert dynamic CPU models to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[10/22] target/riscv: move 128-bit check to TCG realize target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[09/22] target/riscv: convert bare CPU models to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[08/22] target/riscv: convert profile CPU models to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[07/22] target/riscv: convert abstract CPU classes to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[06/22] target/riscv: add more RISCVCPUDef fields target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[05/22] target/riscv: move RISCVCPUConfig fields to a header file target/riscv: declarative CPU definitions - 1 - --- 2025-02-06 Paolo Bonzini New
[04/22] target/riscv: merge riscv_cpu_class_init with the class_base function target/riscv: declarative CPU definitions - 1 - --- 2025-02-06 Paolo Bonzini New
[03/22] target/riscv: store RISCVCPUDef struct directly in the class target/riscv: declarative CPU definitions - 1 - --- 2025-02-06 Paolo Bonzini New
[02/22] target/riscv: introduce RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[01/22] target/riscv: remove unused macro DEFINE_CPU target/riscv: declarative CPU definitions - 1 - --- 2025-02-06 Paolo Bonzini New
[7/7] hw/riscv: Move few objects to common_ss[] to build them once hw/riscv: Move few units to common_ss[] - - - --- 2025-02-06 Philippe Mathieu-Daudé New
[6/7] hw/riscv/hart: Make 'riscv_hart.h' header target-agnostic hw/riscv: Move few units to common_ss[] - - - --- 2025-02-06 Philippe Mathieu-Daudé New
[5/7] hw/riscv/iommu: Reduce needs for target-specific code hw/riscv: Move few units to common_ss[] - - - --- 2025-02-06 Philippe Mathieu-Daudé New
[4/7] hw/riscv/boot: Use 'hwaddr' type for firmware addresses hw/riscv: Move few units to common_ss[] - - - --- 2025-02-06 Philippe Mathieu-Daudé New
[3/7] hw/riscv/opentitan: Include missing 'exec/address-spaces.h' header hw/riscv: Move few units to common_ss[] - 2 - --- 2025-02-06 Philippe Mathieu-Daudé New
[2/7] target/riscv: Move target-agnostic definitions to 'cpu-qom.h' hw/riscv: Move few units to common_ss[] - - - --- 2025-02-06 Philippe Mathieu-Daudé New
[1/7] MAINTAINERS: Unify Alistair's professional email address hw/riscv: Move few units to common_ss[] - - - --- 2025-02-06 Philippe Mathieu-Daudé New
[RFC,4/4] migration: Check migration error after loadvm crypto,io,migration: Add support to gnutls_bye() - - - --- 2025-02-06 Fabiano Rosas New
[RFC,3/4] migration/multifd: Terminate the TLS connection crypto,io,migration: Add support to gnutls_bye() - - - --- 2025-02-06 Fabiano Rosas New
[RFC,2/4] io: tls: Add qio_channel_tls_bye crypto,io,migration: Add support to gnutls_bye() - - - --- 2025-02-06 Fabiano Rosas New
[RFC,1/4] crypto: Allow gracefully ending the TLS session crypto,io,migration: Add support to gnutls_bye() - - - --- 2025-02-06 Fabiano Rosas New
target/tricore: Inline TARGET_LONG_BITS in decode_rr_logical_shift() target/tricore: Inline TARGET_LONG_BITS in decode_rr_logical_shift() - 1 - --- 2025-02-06 Philippe Mathieu-Daudé New
block: Remove unused blk_op_is_blocked() block: Remove unused blk_op_is_blocked() - 2 - --- 2025-02-06 Kevin Wolf New
[PULL,0/7] 9p queue 2025-02-06 - - - --- 2025-02-06 Christian Schoenebeck New
[PULL,3/7] 9pfs: improve v9fs_open() tracing [PULL,1/7] 9pfs: improve v9fs_walk() tracing - - - --- 2025-02-06 Christian Schoenebeck New
[PULL,5/7] tests/9p: add use_dir_after_unlink test [PULL,1/7] 9pfs: improve v9fs_walk() tracing - - - --- 2025-02-06 Christian Schoenebeck New
[PULL,2/7] 9pfs: make multidevs=remap default [PULL,1/7] 9pfs: improve v9fs_walk() tracing - - - --- 2025-02-06 Christian Schoenebeck New
[PULL,4/7] tests/9p: rename test use_after_unlink -> use_file_after_unlink [PULL,1/7] 9pfs: improve v9fs_walk() tracing - - - --- 2025-02-06 Christian Schoenebeck New
[PULL,7/7] MAINTAINERS: Mark me as reviewer only for 9pfs [PULL,1/7] 9pfs: improve v9fs_walk() tracing - 1 - --- 2025-02-06 Christian Schoenebeck New
[PULL,6/7] tests/9p: extend use_dir_after_unlink test with Treaddir [PULL,1/7] 9pfs: improve v9fs_walk() tracing - - - --- 2025-02-06 Christian Schoenebeck New
[PULL,1/7] 9pfs: improve v9fs_walk() tracing [PULL,1/7] 9pfs: improve v9fs_walk() tracing - 2 - --- 2025-02-06 Christian Schoenebeck New
[2/2] disas/riscv: Add missing Sdtrig CSRs disas/riscv: Add missing Sdtrig CSRs 1 - - --- 2025-02-06 Rob Bradford New
[1/2] disas/riscv: Fix minor whitespace issues disas/riscv: Add missing Sdtrig CSRs - 1 - --- 2025-02-06 Rob Bradford New
[6/6] hw/core/machine.c: Make -machine dumpdtb=file.dtb with no DTB an error hw: Centralize handling, improve error messages for -machine dumpdtb - 1 - --- 2025-02-06 Peter Maydell New
[5/6] hw: Centralize handling of -machine dumpdtb option hw: Centralize handling, improve error messages for -machine dumpdtb - 1 - --- 2025-02-06 Peter Maydell New
[4/6] hw/mips/boston: Support dumpdtb monitor commands hw: Centralize handling, improve error messages for -machine dumpdtb - 1 - --- 2025-02-06 Peter Maydell New
[3/6] hw/mips/boston: Check for error return from boston_fdt_filter() hw: Centralize handling, improve error messages for -machine dumpdtb - 1 - --- 2025-02-06 Peter Maydell New
[2/6] hw/openrisc: Support monitor dumpdtb command hw: Centralize handling, improve error messages for -machine dumpdtb - 2 - --- 2025-02-06 Peter Maydell New
[1/6] monitor/hmp-cmds.c: Clean up hmp_dumpdtb printf hw: Centralize handling, improve error messages for -machine dumpdtb - 2 - --- 2025-02-06 Peter Maydell New
[5/5] hw/vfio/common: Add a trace point in vfio_reset_handler Fix vIOMMU reset order - 1 - --- 2025-02-06 Eric Auger New
[4/5] hw/arm/smmuv3: Move reset to exit phase Fix vIOMMU reset order - - - --- 2025-02-06 Eric Auger New
[3/5] hw/i386/intel_iommu: Tear down address spaces before IOMMU reset Fix vIOMMU reset order - - - --- 2025-02-06 Eric Auger New
[2/5] hw/i386/intel-iommu: Migrate to 3-phase reset Fix vIOMMU reset order - - - --- 2025-02-06 Eric Auger New
[1/5] hw/virtio/virtio-iommu: Migrate to 3-phase reset Fix vIOMMU reset order - - - --- 2025-02-06 Eric Auger New
[v3,7/7] vfio: Remove superfluous error report in vfio_listener_region_add() vfio: Improve error reporting when MMIO region mapping fails - 1 - --- 2025-02-06 Cédric Le Goater New
[v3,6/7] vfio: Remove reports of DMA mapping errors in backends vfio: Improve error reporting when MMIO region mapping fails - - - --- 2025-02-06 Cédric Le Goater New
[v3,5/7] vfio: Improve error reporting when MMIO region mapping fails vfio: Improve error reporting when MMIO region mapping fails - - - --- 2025-02-06 Cédric Le Goater New
[v3,4/7] vfio: Introduce vfio_get_vfio_device() vfio: Improve error reporting when MMIO region mapping fails - - - --- 2025-02-06 Cédric Le Goater New
[v3,3/7] vfio: Rephrase comment in vfio_listener_region_add() error path vfio: Improve error reporting when MMIO region mapping fails - - - --- 2025-02-06 Cédric Le Goater New
[v3,2/7] vfio/pci: Replace "iommu_device" by "vIOMMU" vfio: Improve error reporting when MMIO region mapping fails - - - --- 2025-02-06 Cédric Le Goater New
[v3,1/7] util/error: Introduce warn_report_err_once() vfio: Improve error reporting when MMIO region mapping fails - 1 - --- 2025-02-06 Cédric Le Goater New
[v5,16/16] tests/functional: Run cross-endian microblaze tests hw/microblaze: Allow running cross-endian vCPUs - 1 - --- 2025-02-06 Philippe Mathieu-Daudé New
[v5,15/16] tests/functional: Have microblaze tests inherit common parent class hw/microblaze: Allow running cross-endian vCPUs - 1 - --- 2025-02-06 Philippe Mathieu-Daudé New
[v5,14/16] tests/functional: Remove sleep() kludges from microblaze tests hw/microblaze: Allow running cross-endian vCPUs - 2 - --- 2025-02-06 Philippe Mathieu-Daudé New
[v5,13/16] tests/functional: Allow microblaze tests to take a machine name argument hw/microblaze: Allow running cross-endian vCPUs - 1 - --- 2025-02-06 Philippe Mathieu-Daudé New
[v5,12/16] tests/functional: Explicit endianness of microblaze assets hw/microblaze: Allow running cross-endian vCPUs - 2 - --- 2025-02-06 Philippe Mathieu-Daudé New
[v5,11/16] hw/microblaze: Support various endianness for s3adsp1800 machines hw/microblaze: Allow running cross-endian vCPUs - 1 - --- 2025-02-06 Philippe Mathieu-Daudé New
[v5,10/16] target/microblaze: Consider endianness while translating code hw/microblaze: Allow running cross-endian vCPUs - 1 - --- 2025-02-06 Philippe Mathieu-Daudé New
[v5,09/16] target/microblaze: Introduce mo_endian() helper hw/microblaze: Allow running cross-endian vCPUs - 1 - --- 2025-02-06 Philippe Mathieu-Daudé New
[v5,08/16] target/microblaze: Set MO_TE once in do_load() / do_store() hw/microblaze: Allow running cross-endian vCPUs - 1 - --- 2025-02-06 Philippe Mathieu-Daudé New
[v5,07/16] target/microblaze: Explode MO_TExx -> MO_TE | MO_xx hw/microblaze: Allow running cross-endian vCPUs - 2 - --- 2025-02-06 Philippe Mathieu-Daudé New
[v5,06/16] hw/arm/xlnx-zynqmp: Use &error_abort for programming errors hw/microblaze: Allow running cross-endian vCPUs - 1 - --- 2025-02-06 Philippe Mathieu-Daudé New
[v5,05/16] hw/ssi/xilinx_spi: Make device endianness configurable hw/microblaze: Allow running cross-endian vCPUs - 1 - --- 2025-02-06 Philippe Mathieu-Daudé New
[v5,04/16] hw/char/xilinx_uartlite: Make device endianness configurable hw/microblaze: Allow running cross-endian vCPUs - 1 - --- 2025-02-06 Philippe Mathieu-Daudé New
[v5,03/16] hw/timer/xilinx_timer: Make device endianness configurable hw/microblaze: Allow running cross-endian vCPUs - 1 - --- 2025-02-06 Philippe Mathieu-Daudé New
[v5,02/16] hw/net/xilinx_ethlite: Make device endianness configurable hw/microblaze: Allow running cross-endian vCPUs - 2 - --- 2025-02-06 Philippe Mathieu-Daudé New
[v5,01/16] hw/intc/xilinx_intc: Make device endianness configurable hw/microblaze: Allow running cross-endian vCPUs - 1 - --- 2025-02-06 Philippe Mathieu-Daudé New
[4/4] vfio/igd: sync GPU generation with i915 kernel driver vfio/igd: sync PCI IDs with i915 - - - --- 2025-02-06 Corvin Köhne New
[3/4] vfio/igd: use PCI ID defines to detect IGD gen vfio/igd: sync PCI IDs with i915 - - - --- 2025-02-06 Corvin Köhne New
[2/4] scripts/update-linux-headers: include PCI ID header for Intel GPUs vfio/igd: sync PCI IDs with i915 - - - --- 2025-02-06 Corvin Köhne New
[1/4] include/standard-headers: add PCI IDs for Intel GPUs vfio/igd: sync PCI IDs with i915 - - - --- 2025-02-06 Corvin Köhne New
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