Show patches with: Series = Add RISC-V Counter delegation ISA extension support       |    Archived = No       |   11 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[v3,11/11] target/riscv: Add configuration for S[m|s]csrind, Smcdeleg/Ssccfg Add RISC-V Counter delegation ISA extension support 1 - - --- 2024-11-18 Atish Kumar Patra New
[v3,10/11] target/riscv: Add implied rule for counter delegation extensions Add RISC-V Counter delegation ISA extension support - - - --- 2024-11-18 Atish Kumar Patra New
[v3,09/11] target/riscv: Invoke pmu init after feature enable Add RISC-V Counter delegation ISA extension support - 1 - --- 2024-11-18 Atish Kumar Patra New
[v3,08/11] target/riscv: Add counter delegation/configuration support Add RISC-V Counter delegation ISA extension support - - - --- 2024-11-18 Atish Kumar Patra New
[v3,07/11] target/riscv: Add select value range check for counter delegation Add RISC-V Counter delegation ISA extension support - 1 - --- 2024-11-18 Atish Kumar Patra New
[v3,06/11] target/riscv: Add counter delegation definitions Add RISC-V Counter delegation ISA extension support - 1 - --- 2024-11-18 Atish Kumar Patra New
[v3,05/11] target/riscv: Add properties for counter delegation ISA extensions Add RISC-V Counter delegation ISA extension support - - - --- 2024-11-18 Atish Kumar Patra New
[v3,04/11] target/riscv: Support generic CSR indirect access Add RISC-V Counter delegation ISA extension support - - - --- 2024-11-18 Atish Kumar Patra New
[v3,03/11] target/riscv: Enable S*stateen bits for AIA Add RISC-V Counter delegation ISA extension support - 1 - --- 2024-11-18 Atish Kumar Patra New
[v3,02/11] target/riscv: Decouple AIA processing from xiselect and xireg Add RISC-V Counter delegation ISA extension support - 1 - --- 2024-11-18 Atish Kumar Patra New
[v3,01/11] target/riscv: Add properties for Indirect CSR Access extension Add RISC-V Counter delegation ISA extension support - - - --- 2024-11-18 Atish Kumar Patra New