Show patches with: Series = target/riscv: declarative CPU definitions       |    Archived = No       |   22 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[22/22] target/riscv: move SATP modes out of CPUConfig target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[21/22] target/riscv: remove .instance_post_init target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[20/22] target/riscv: convert Xiangshan Nanhu to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[19/22] target/riscv: convert Ventana V1 to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[18/22] target/riscv: convert TT Ascalon to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[17/22] target/riscv: convert TT C906 to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[16/22] target/riscv: generalize custom CSR functionality target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[15/22] target/riscv: th: make CSR insertion test a bit more intuitive target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[14/22] target/riscv: convert SiFive U models to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[13/22] target/riscv: convert ibex CPU models to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[12/22] target/riscv: convert SiFive E CPU models to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[11/22] target/riscv: convert dynamic CPU models to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[10/22] target/riscv: move 128-bit check to TCG realize target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[09/22] target/riscv: convert bare CPU models to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[08/22] target/riscv: convert profile CPU models to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[07/22] target/riscv: convert abstract CPU classes to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[06/22] target/riscv: add more RISCVCPUDef fields target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[05/22] target/riscv: move RISCVCPUConfig fields to a header file target/riscv: declarative CPU definitions - 1 - --- 2025-02-06 Paolo Bonzini New
[04/22] target/riscv: merge riscv_cpu_class_init with the class_base function target/riscv: declarative CPU definitions - 1 - --- 2025-02-06 Paolo Bonzini New
[03/22] target/riscv: store RISCVCPUDef struct directly in the class target/riscv: declarative CPU definitions - 1 - --- 2025-02-06 Paolo Bonzini New
[02/22] target/riscv: introduce RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-06 Paolo Bonzini New
[01/22] target/riscv: remove unused macro DEFINE_CPU target/riscv: declarative CPU definitions - 1 - --- 2025-02-06 Paolo Bonzini New