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Tue, 11 Apr 2017 15:32:56 -0700 From: Alistair Francis To: , Date: Tue, 11 Apr 2017 15:30:27 -0700 Message-ID: <026dbe01a1d42619eee30ce3f2079741bf04bc73.1491947224.git.alistair.francis@xilinx.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: References: X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.1.0.1062-22998.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(6009001)(39450400003)(39400400002)(39410400002)(39830400002)(2980300002)(438002)(189002)(199003)(9170700003)(47776003)(48376002)(305945005)(81166006)(106466001)(38730400002)(8936002)(50466002)(77096006)(4326008)(189998001)(8676002)(118296001)(50226002)(9786002)(50986999)(76176999)(356003)(36386004)(54906002)(2950100002)(5660300001)(5003940100001)(63266004)(6666003)(39060400002)(36756003)(2906002)(33646002)(107986001); DIR:OUT; SFP:1101; SCL:1; SRVR:CY4PR02MB2584; H:xsj-pvapsmtpgw01; FPR:; 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Ip=[149.199.60.83]; Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR02MB2584 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 104.47.34.85 Subject: [Qemu-devel] [PATCH v3 5/5] xlnx-zynqmp: Set the Cadence GEM revision X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair23@gmail.com, f4bug@amsat.org, alistair.francis@xilinx.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Alistair Francis Reviewed-by: Peter Maydell --- hw/arm/xlnx-zynqmp.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index bc4e66b..e41b6fe 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -30,6 +30,8 @@ #define ARM_PHYS_TIMER_PPI 30 #define ARM_VIRT_TIMER_PPI 27 +#define GEM_REVISION 0x40070106 + #define GIC_BASE_ADDR 0xf9000000 #define GIC_DIST_ADDR 0xf9010000 #define GIC_CPU_ADDR 0xf9020000 @@ -334,8 +336,10 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) qemu_check_nic_model(nd, TYPE_CADENCE_GEM); qdev_set_nic_properties(DEVICE(&s->gem[i]), nd); } + object_property_set_int(OBJECT(&s->gem[i]), GEM_REVISION, "revision", + &error_abort); object_property_set_int(OBJECT(&s->gem[i]), 2, "num-priority-queues", - &error_abort); + &error_abort); object_property_set_bool(OBJECT(&s->gem[i]), true, "realized", &err); if (err) { error_propagate(errp, err);