| Message ID | 044d68f67066073484257f22b82fa946d025e27d.1734504907.git.lc00631@tecorigin.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Enhanced VSTART and VL Checks for Vector Instructions | expand |
On 12/18/24 4:15 AM, Chao Liu wrote: We want a commit message here because the change is not trivial. You gave an explanation in the v1 cover letter: --- Recently, when I was writing a RISCV test, I found that when VL is set to 0, the instruction should be nop, but when I tested it, I found that QEMU will treat all elements as tail elements, and in the case of VTA=1, write all elements to 1. After troubleshooting, it was found that the vext_vx_rm_1 function was called in the vext_vx_rm_2, and then the vext_set_elems_1s function was called to process the tail element, but only VSTART >= vl was checked in the vext_vx_rm_1 function, which caused the tail element to still be processed even if it was returned in advance. So I've made the following change: put VSTART_CHECK_EARLY_EXIT(env) at the beginning of the vext_vx_rm_2 function, so that the VSTART register is checked correctly. ---- You can add this text as a commit msg for this patch, also mentioning that you're changing vext_vv_rm_1 / vext_vv_rm_2 for the same reason. > fix: https://lore.kernel.org/all/20240322085319.1758843-8-alistair.francis@wdc.com/ The tag format we use in QEMU refers to the commit in the tree, not the link for the pull request email. In this case the tag would be: Fixes: df4252b2ec ("target/riscv/vector_helpers: do early exit when vstart >= vl") > Signed-off-by: Chao Liu <lc00631@tecorigin.com> > --- The code itself looks good to me. Thanks, Daniel > target/riscv/vector_helper.c | 18 ++++++++++++++---- > 1 file changed, 14 insertions(+), 4 deletions(-) > > diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c > index 4f14395808..5f1fc24d99 100644 > --- a/target/riscv/vector_helper.c > +++ b/target/riscv/vector_helper.c > @@ -2151,8 +2151,6 @@ vext_vv_rm_1(void *vd, void *v0, void *vs1, void *vs2, > uint32_t vl, uint32_t vm, int vxrm, > opivv2_rm_fn *fn, uint32_t vma, uint32_t esz) > { > - VSTART_CHECK_EARLY_EXIT(env, vl); > - > for (uint32_t i = env->vstart; i < vl; i++) { > if (!vm && !vext_elem_mask(v0, i)) { > /* set masked-off elements to 1s */ > @@ -2176,6 +2174,8 @@ vext_vv_rm_2(void *vd, void *v0, void *vs1, void *vs2, > uint32_t vta = vext_vta(desc); > uint32_t vma = vext_vma(desc); > > + VSTART_CHECK_EARLY_EXIT(env, vl); > + > switch (env->vxrm) { > case 0: /* rnu */ > vext_vv_rm_1(vd, v0, vs1, vs2, > @@ -2278,8 +2278,6 @@ vext_vx_rm_1(void *vd, void *v0, target_long s1, void *vs2, > uint32_t vl, uint32_t vm, int vxrm, > opivx2_rm_fn *fn, uint32_t vma, uint32_t esz) > { > - VSTART_CHECK_EARLY_EXIT(env, vl); > - > for (uint32_t i = env->vstart; i < vl; i++) { > if (!vm && !vext_elem_mask(v0, i)) { > /* set masked-off elements to 1s */ > @@ -2303,6 +2301,8 @@ vext_vx_rm_2(void *vd, void *v0, target_long s1, void *vs2, > uint32_t vta = vext_vta(desc); > uint32_t vma = vext_vma(desc); > > + VSTART_CHECK_EARLY_EXIT(env, vl); > + > switch (env->vxrm) { > case 0: /* rnu */ > vext_vx_rm_1(vd, v0, s1, vs2, > @@ -4638,6 +4638,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, \ > uint32_t i; \ > TD s1 = *((TD *)vs1 + HD(0)); \ > \ > + VSTART_CHECK_EARLY_EXIT(env, vl); \ > + \ > for (i = env->vstart; i < vl; i++) { \ > TS2 s2 = *((TS2 *)vs2 + HS2(i)); \ > if (!vm && !vext_elem_mask(v0, i)) { \ > @@ -4724,6 +4726,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, \ > uint32_t i; \ > TD s1 = *((TD *)vs1 + HD(0)); \ > \ > + VSTART_CHECK_EARLY_EXIT(env, vl); \ > + \ > for (i = env->vstart; i < vl; i++) { \ > TS2 s2 = *((TS2 *)vs2 + HS2(i)); \ > if (!vm && !vext_elem_mask(v0, i)) { \ > @@ -4886,6 +4890,8 @@ static void vmsetm(void *vd, void *v0, void *vs2, CPURISCVState *env, > int i; > bool first_mask_bit = false; > > + VSTART_CHECK_EARLY_EXIT(env, vl); > + > for (i = env->vstart; i < vl; i++) { > if (!vm && !vext_elem_mask(v0, i)) { > /* set masked-off elements to 1s */ > @@ -4958,6 +4964,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs2, CPURISCVState *env, \ > uint32_t sum = 0; \ > int i; \ > \ > + VSTART_CHECK_EARLY_EXIT(env, vl); \ > + \ > for (i = env->vstart; i < vl; i++) { \ > if (!vm && !vext_elem_mask(v0, i)) { \ > /* set masked-off elements to 1s */ \ > @@ -5316,6 +5324,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2, \ > uint32_t vta = vext_vta(desc); \ > uint32_t num = 0, i; \ > \ > + VSTART_CHECK_EARLY_EXIT(env, vl); \ > + \ > for (i = env->vstart; i < vl; i++) { \ > if (!vext_elem_mask(vs1, i)) { \ > continue; \
diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index 4f14395808..5f1fc24d99 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -2151,8 +2151,6 @@ vext_vv_rm_1(void *vd, void *v0, void *vs1, void *vs2, uint32_t vl, uint32_t vm, int vxrm, opivv2_rm_fn *fn, uint32_t vma, uint32_t esz) { - VSTART_CHECK_EARLY_EXIT(env, vl); - for (uint32_t i = env->vstart; i < vl; i++) { if (!vm && !vext_elem_mask(v0, i)) { /* set masked-off elements to 1s */ @@ -2176,6 +2174,8 @@ vext_vv_rm_2(void *vd, void *v0, void *vs1, void *vs2, uint32_t vta = vext_vta(desc); uint32_t vma = vext_vma(desc); + VSTART_CHECK_EARLY_EXIT(env, vl); + switch (env->vxrm) { case 0: /* rnu */ vext_vv_rm_1(vd, v0, vs1, vs2, @@ -2278,8 +2278,6 @@ vext_vx_rm_1(void *vd, void *v0, target_long s1, void *vs2, uint32_t vl, uint32_t vm, int vxrm, opivx2_rm_fn *fn, uint32_t vma, uint32_t esz) { - VSTART_CHECK_EARLY_EXIT(env, vl); - for (uint32_t i = env->vstart; i < vl; i++) { if (!vm && !vext_elem_mask(v0, i)) { /* set masked-off elements to 1s */ @@ -2303,6 +2301,8 @@ vext_vx_rm_2(void *vd, void *v0, target_long s1, void *vs2, uint32_t vta = vext_vta(desc); uint32_t vma = vext_vma(desc); + VSTART_CHECK_EARLY_EXIT(env, vl); + switch (env->vxrm) { case 0: /* rnu */ vext_vx_rm_1(vd, v0, s1, vs2, @@ -4638,6 +4638,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, \ uint32_t i; \ TD s1 = *((TD *)vs1 + HD(0)); \ \ + VSTART_CHECK_EARLY_EXIT(env, vl); \ + \ for (i = env->vstart; i < vl; i++) { \ TS2 s2 = *((TS2 *)vs2 + HS2(i)); \ if (!vm && !vext_elem_mask(v0, i)) { \ @@ -4724,6 +4726,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, \ uint32_t i; \ TD s1 = *((TD *)vs1 + HD(0)); \ \ + VSTART_CHECK_EARLY_EXIT(env, vl); \ + \ for (i = env->vstart; i < vl; i++) { \ TS2 s2 = *((TS2 *)vs2 + HS2(i)); \ if (!vm && !vext_elem_mask(v0, i)) { \ @@ -4886,6 +4890,8 @@ static void vmsetm(void *vd, void *v0, void *vs2, CPURISCVState *env, int i; bool first_mask_bit = false; + VSTART_CHECK_EARLY_EXIT(env, vl); + for (i = env->vstart; i < vl; i++) { if (!vm && !vext_elem_mask(v0, i)) { /* set masked-off elements to 1s */ @@ -4958,6 +4964,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs2, CPURISCVState *env, \ uint32_t sum = 0; \ int i; \ \ + VSTART_CHECK_EARLY_EXIT(env, vl); \ + \ for (i = env->vstart; i < vl; i++) { \ if (!vm && !vext_elem_mask(v0, i)) { \ /* set masked-off elements to 1s */ \ @@ -5316,6 +5324,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2, \ uint32_t vta = vext_vta(desc); \ uint32_t num = 0, i; \ \ + VSTART_CHECK_EARLY_EXIT(env, vl); \ + \ for (i = env->vstart; i < vl; i++) { \ if (!vext_elem_mask(vs1, i)) { \ continue; \
fix: https://lore.kernel.org/all/20240322085319.1758843-8-alistair.francis@wdc.com/ Signed-off-by: Chao Liu <lc00631@tecorigin.com> --- target/riscv/vector_helper.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-)