From patchwork Thu Jan 28 03:02:39 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Gabriel L. Somlo" X-Patchwork-Id: 8145901 Return-Path: X-Original-To: patchwork-qemu-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 962CF9F38B for ; Thu, 28 Jan 2016 03:03:46 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 01382202EB for ; Thu, 28 Jan 2016 03:03:46 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 450CD202DD for ; Thu, 28 Jan 2016 03:03:45 +0000 (UTC) Received: from localhost ([::1]:53631 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aOcs4-0004Zq-Ko for patchwork-qemu-devel@patchwork.kernel.org; Wed, 27 Jan 2016 22:03:44 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53890) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aOcrl-0004ID-9R for qemu-devel@nongnu.org; Wed, 27 Jan 2016 22:03:26 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aOcrj-000646-Uh for qemu-devel@nongnu.org; Wed, 27 Jan 2016 22:03:25 -0500 Received: from relay-04.andrew.cmu.edu ([128.2.105.169]:51484 helo=relay.andrew.cmu.edu) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aOcrj-00063p-Q7 for qemu-devel@nongnu.org; Wed, 27 Jan 2016 22:03:23 -0500 Received: from HEDWIG.ini.cmu.edu (HEDWIG.INI.CMU.EDU [128.2.16.51]) by relay.andrew.cmu.edu (8.14.8/8.14.8) with ESMTP id u0S32fAZ025905; Wed, 27 Jan 2016 22:02:44 -0500 From: "Gabriel L. Somlo" To: gregkh@linuxfoundation.org, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, arnd@arndb.de, lersek@redhat.com, ralf@linux-mips.org, rmk+kernel@arm.linux.org.uk, eric@anholt.net, hanjun.guo@linaro.org, zajec5@gmail.com, sudeep.holla@arm.com, agross@codeaurora.org, linux-api@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Date: Wed, 27 Jan 2016 22:02:39 -0500 Message-Id: <1453950161-13252-4-git-send-email-somlo@cmu.edu> X-Mailer: git-send-email 2.4.3 In-Reply-To: <1453950161-13252-1-git-send-email-somlo@cmu.edu> References: <1453950161-13252-1-git-send-email-somlo@cmu.edu> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.74 on 128.2.105.169 X-MIME-Autoconverted: from 8bit to quoted-printable by relay.andrew.cmu.edu id u0S32fAZ025905 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 128.2.105.169 Cc: peter.maydell@linaro.org, ehabkost@redhat.com, ard.biesheuvel@linaro.org, matt@codeblueprint.co.uk, stefanha@gmail.com, mst@redhat.com, qemu-devel@nongnu.org, leif.lindholm@linaro.org, luto@amacapital.net, kraxel@redhat.com, pbonzini@redhat.com, imammedo@redhat.com, revol@free.fr, rth@twiddle.net Subject: [Qemu-devel] [PATCH v6 3/5] acpi: pc: add fw_cfg device node to ssdt X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a fw_cfg device node to the ACPI SSDT. While the guest-side firmware can't utilize this information (since it has to access the hard-coded fw_cfg device to extract ACPI tables to begin with), having fw_cfg listed in ACPI will help the guest kernel keep a more accurate inventory of in-use IO port regions. Signed-off-by: Gabriel Somlo Reviewed-by: Laszlo Ersek Reviewed-by: Marc Marí --- hw/i386/acpi-build.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 78758e2..8a9ae9d 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -2100,6 +2100,35 @@ build_ssdt(GArray *table_data, GArray *linker, aml_append(scope, aml_name_decl("_S5", pkg)); aml_append(ssdt, scope); + /* create fw_cfg node, unconditionally */ + { + /* when using port i/o, the 8-bit data register *always* overlaps + * with half of the 16-bit control register. Hence, the total size + * of the i/o region used is FW_CFG_CTL_SIZE; when using DMA, the + * DMA control register is located at FW_CFG_DMA_IO_BASE + 4 */ + uint8_t io_size = object_property_get_bool(OBJECT(guest_info->fw_cfg), + "dma_enabled", NULL) ? + ROUND_UP(FW_CFG_CTL_SIZE, 4) + sizeof(dma_addr_t) : + FW_CFG_CTL_SIZE; + + scope = aml_scope("\\_SB"); + dev = aml_device("FWCF"); + + aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0002"))); + + /* device present, functioning, decoding, not shown in UI */ + aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); + + crs = aml_resource_template(); + aml_append(crs, + aml_io(AML_DECODE16, FW_CFG_IO_BASE, FW_CFG_IO_BASE, 0x01, io_size) + ); + aml_append(dev, aml_name_decl("_CRS", crs)); + + aml_append(scope, dev); + aml_append(ssdt, scope); + } + if (misc->applesmc_io_base) { scope = aml_scope("\\_SB.PCI0.ISA"); dev = aml_device("SMC");