diff mbox

[v7,08/13] target-ppc: Introduce PowerPC specific CPU core device

Message ID 1453960195-15181-9-git-send-email-bharata@linux.vnet.ibm.com (mailing list archive)
State New, archived
Headers show

Commit Message

Bharata B Rao Jan. 28, 2016, 5:49 a.m. UTC 
CPU core device is a container of CPU thread devices.  CPU hotplug is
performed at the granularity of CPU core device. When hotplugged, CPU core
creates CPU thread devices.

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
---
 hw/ppc/Makefile.objs      |  1 +
 hw/ppc/cpu-core.c         | 75 +++++++++++++++++++++++++++++++++++++++++++++++
 include/hw/ppc/cpu-core.h | 33 +++++++++++++++++++++
 3 files changed, 109 insertions(+)
 create mode 100644 hw/ppc/cpu-core.c
 create mode 100644 include/hw/ppc/cpu-core.h

Comments

David Gibson Feb. 1, 2016, 2:39 a.m. UTC | #1 
On Thu, Jan 28, 2016 at 11:19:50AM +0530, Bharata B Rao wrote:
> CPU core device is a container of CPU thread devices.  CPU hotplug is
> performed at the granularity of CPU core device. When hotplugged, CPU core
> creates CPU thread devices.
> 
> Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>

The basic logic here seems fine.

However, I'm not really convinced that a "powerpc generic" device
makes sense here.  Given the diversity of powerpc platforms, it's
pretty plausible they could have very different restrictions about how
hotplug needs to operate.

So, I think it would make more sense to go for more specific devices
that either represent real hardware chips / modules, or something else
that makes sense for a specific platform.  So, in the first instance a
"PAPR virtual module" device.

It would make sense to have that derive from a more-or-less generic
base class with essentially the logic below, since even if we have
significantly different variants they're likely to share the basic
logic.  But I don't think that base type should be directly
instantiable.

Of course, once that's the case, there's really nothing ppc specific
about the base device either.

> ---
>  hw/ppc/Makefile.objs      |  1 +
>  hw/ppc/cpu-core.c         | 75 +++++++++++++++++++++++++++++++++++++++++++++++
>  include/hw/ppc/cpu-core.h | 33 +++++++++++++++++++++
>  3 files changed, 109 insertions(+)
>  create mode 100644 hw/ppc/cpu-core.c
>  create mode 100644 include/hw/ppc/cpu-core.h
> 
> diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs
> index c1ffc77..a6b7cfb 100644
> --- a/hw/ppc/Makefile.objs
> +++ b/hw/ppc/Makefile.objs
> @@ -21,3 +21,4 @@ obj-$(CONFIG_E500) += e500.o mpc8544ds.o e500plat.o
>  obj-$(CONFIG_E500) += mpc8544_guts.o ppce500_spin.o
>  # PowerPC 440 Xilinx ML507 reference board.
>  obj-$(CONFIG_XILINX) += virtex_ml507.o
> +obj-y += cpu-core.o
> diff --git a/hw/ppc/cpu-core.c b/hw/ppc/cpu-core.c
> new file mode 100644
> index 0000000..aa96e79
> --- /dev/null
> +++ b/hw/ppc/cpu-core.c
> @@ -0,0 +1,75 @@
> +/*
> + * PowerPC CPU core device, acts as container of CPU thread devices.
> + *
> + * Copyright (C) 2016 Bharata B Rao <bharata@linux.vnet.ibm.com>
> + *
> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
> + * See the COPYING file in the top-level directory.
> + */
> +#include "hw/ppc/cpu-core.h"
> +#include "hw/boards.h"
> +#include <sysemu/cpus.h>
> +#include "qemu/error-report.h"
> +
> +static int ppc_cpu_core_realize_child(Object *child, void *opaque)
> +{
> +    Error **errp = opaque;
> +
> +    object_property_set_bool(child, true, "realized", errp);
> +    if (*errp) {
> +        return 1;
> +    }
> +
> +    return 0;
> +}
> +
> +static void ppc_cpu_core_realize(DeviceState *dev, Error **errp)
> +{
> +    object_child_foreach(OBJECT(dev), ppc_cpu_core_realize_child, errp);
> +}
> +
> +static void ppc_cpu_core_class_init(ObjectClass *oc, void *data)
> +{
> +    DeviceClass *dc = DEVICE_CLASS(oc);
> +
> +    dc->realize = ppc_cpu_core_realize;
> +    dc->desc = "PowerPC CPU core";
> +}
> +
> +static void ppc_cpu_core_instance_init(Object *obj)
> +{
> +    int i;
> +    CPUState *cpu;
> +    MachineState *machine = MACHINE(qdev_get_machine());
> +    PowerPCCPUCore *core = POWERPC_CPU_CORE(obj);
> +
> +    /* Create as many CPU threads as specified in the topology */
> +    for (i = 0; i < smp_threads; i++) {
> +        cpu = cpu_generic_init(TYPE_POWERPC_CPU, machine->cpu_model);
> +        if (!cpu) {
> +            error_report("Unable to find CPU definition: %s",
> +                          machine->cpu_model);
> +            exit(EXIT_FAILURE);
> +        }
> +        object_property_add_child(obj, "thread[*]", OBJECT(cpu), &error_abort);
> +        object_unref(OBJECT(cpu));
> +        if (!i) {
> +            core->thread0 = POWERPC_CPU(cpu);
> +        }
> +    }
> +}
> +
> +static const TypeInfo ppc_cpu_core_type_info = {
> +    .name = TYPE_POWERPC_CPU_CORE,
> +    .parent = TYPE_DEVICE,
> +    .class_init = ppc_cpu_core_class_init,
> +    .instance_init = ppc_cpu_core_instance_init,
> +    .instance_size = sizeof(PowerPCCPUCore),
> +};
> +
> +static void cpu_core_register_types(void)
> +{
> +    type_register_static(&ppc_cpu_core_type_info);
> +}
> +
> +type_init(cpu_core_register_types)
> diff --git a/include/hw/ppc/cpu-core.h b/include/hw/ppc/cpu-core.h
> new file mode 100644
> index 0000000..ff2ebc2
> --- /dev/null
> +++ b/include/hw/ppc/cpu-core.h
> @@ -0,0 +1,33 @@
> +/*
> + * CPU core device.
> + *
> + * Copyright (C) 2016 Bharata B Rao <bharata@linux.vnet.ibm.com>
> + *
> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
> + * See the COPYING file in the top-level directory.
> + */
> +#ifndef HW_PPC_CPU_CORE_H
> +#define HW_PPC_CPU_CORE_H
> +
> +#include "hw/qdev.h"
> +
> +#ifdef TARGET_PPC64
> +#define TYPE_POWERPC_CPU_CORE "powerpc64-cpu-core"
> +#elif defined(TARGET_PPCEMB)
> +#define TYPE_POWERPC_CPU_CORE "embedded-powerpc-cpu-core"
> +#else
> +#define TYPE_POWERPC_CPU_CORE "powerpc-cpu-core"
> +#endif
> +
> +#define POWERPC_CPU_CORE(obj) \
> +    OBJECT_CHECK(PowerPCCPUCore, (obj), TYPE_POWERPC_CPU_CORE)
> +
> +typedef struct PowerPCCPUCore {
> +    /*< private >*/
> +    DeviceState parent_obj;
> +    /*< public >*/
> +
> +    PowerPCCPU *thread0;
> +} PowerPCCPUCore;
> +
> +#endif
diff mbox

Patch

diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs
index c1ffc77..a6b7cfb 100644
--- a/hw/ppc/Makefile.objs
+++ b/hw/ppc/Makefile.objs
@@ -21,3 +21,4 @@  obj-$(CONFIG_E500) += e500.o mpc8544ds.o e500plat.o
 obj-$(CONFIG_E500) += mpc8544_guts.o ppce500_spin.o
 # PowerPC 440 Xilinx ML507 reference board.
 obj-$(CONFIG_XILINX) += virtex_ml507.o
+obj-y += cpu-core.o
diff --git a/hw/ppc/cpu-core.c b/hw/ppc/cpu-core.c
new file mode 100644
index 0000000..aa96e79
--- /dev/null
+++ b/hw/ppc/cpu-core.c
@@ -0,0 +1,75 @@ 
+/*
+ * PowerPC CPU core device, acts as container of CPU thread devices.
+ *
+ * Copyright (C) 2016 Bharata B Rao <bharata@linux.vnet.ibm.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+#include "hw/ppc/cpu-core.h"
+#include "hw/boards.h"
+#include <sysemu/cpus.h>
+#include "qemu/error-report.h"
+
+static int ppc_cpu_core_realize_child(Object *child, void *opaque)
+{
+    Error **errp = opaque;
+
+    object_property_set_bool(child, true, "realized", errp);
+    if (*errp) {
+        return 1;
+    }
+
+    return 0;
+}
+
+static void ppc_cpu_core_realize(DeviceState *dev, Error **errp)
+{
+    object_child_foreach(OBJECT(dev), ppc_cpu_core_realize_child, errp);
+}
+
+static void ppc_cpu_core_class_init(ObjectClass *oc, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(oc);
+
+    dc->realize = ppc_cpu_core_realize;
+    dc->desc = "PowerPC CPU core";
+}
+
+static void ppc_cpu_core_instance_init(Object *obj)
+{
+    int i;
+    CPUState *cpu;
+    MachineState *machine = MACHINE(qdev_get_machine());
+    PowerPCCPUCore *core = POWERPC_CPU_CORE(obj);
+
+    /* Create as many CPU threads as specified in the topology */
+    for (i = 0; i < smp_threads; i++) {
+        cpu = cpu_generic_init(TYPE_POWERPC_CPU, machine->cpu_model);
+        if (!cpu) {
+            error_report("Unable to find CPU definition: %s",
+                          machine->cpu_model);
+            exit(EXIT_FAILURE);
+        }
+        object_property_add_child(obj, "thread[*]", OBJECT(cpu), &error_abort);
+        object_unref(OBJECT(cpu));
+        if (!i) {
+            core->thread0 = POWERPC_CPU(cpu);
+        }
+    }
+}
+
+static const TypeInfo ppc_cpu_core_type_info = {
+    .name = TYPE_POWERPC_CPU_CORE,
+    .parent = TYPE_DEVICE,
+    .class_init = ppc_cpu_core_class_init,
+    .instance_init = ppc_cpu_core_instance_init,
+    .instance_size = sizeof(PowerPCCPUCore),
+};
+
+static void cpu_core_register_types(void)
+{
+    type_register_static(&ppc_cpu_core_type_info);
+}
+
+type_init(cpu_core_register_types)
diff --git a/include/hw/ppc/cpu-core.h b/include/hw/ppc/cpu-core.h
new file mode 100644
index 0000000..ff2ebc2
--- /dev/null
+++ b/include/hw/ppc/cpu-core.h
@@ -0,0 +1,33 @@ 
+/*
+ * CPU core device.
+ *
+ * Copyright (C) 2016 Bharata B Rao <bharata@linux.vnet.ibm.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+#ifndef HW_PPC_CPU_CORE_H
+#define HW_PPC_CPU_CORE_H
+
+#include "hw/qdev.h"
+
+#ifdef TARGET_PPC64
+#define TYPE_POWERPC_CPU_CORE "powerpc64-cpu-core"
+#elif defined(TARGET_PPCEMB)
+#define TYPE_POWERPC_CPU_CORE "embedded-powerpc-cpu-core"
+#else
+#define TYPE_POWERPC_CPU_CORE "powerpc-cpu-core"
+#endif
+
+#define POWERPC_CPU_CORE(obj) \
+    OBJECT_CHECK(PowerPCCPUCore, (obj), TYPE_POWERPC_CPU_CORE)
+
+typedef struct PowerPCCPUCore {
+    /*< private >*/
+    DeviceState parent_obj;
+    /*< public >*/
+
+    PowerPCCPU *thread0;
+} PowerPCCPUCore;
+
+#endif