From patchwork Thu Feb 4 11:47:28 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Igor Mammedov X-Patchwork-Id: 8220371 Return-Path: X-Original-To: patchwork-qemu-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6AA64BEEE5 for ; Thu, 4 Feb 2016 11:52:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B34A620306 for ; Thu, 4 Feb 2016 11:52:08 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E8647202BE for ; Thu, 4 Feb 2016 11:52:07 +0000 (UTC) Received: from localhost ([::1]:41084 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aRISF-0006kg-E5 for patchwork-qemu-devel@patchwork.kernel.org; Thu, 04 Feb 2016 06:52:07 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49580) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aRIO5-0007Mi-7x for qemu-devel@nongnu.org; Thu, 04 Feb 2016 06:47:55 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aRIO2-0000Af-CJ for qemu-devel@nongnu.org; Thu, 04 Feb 2016 06:47:49 -0500 Received: from mx1.redhat.com ([209.132.183.28]:45076) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aRIO2-0000Ab-4O for qemu-devel@nongnu.org; Thu, 04 Feb 2016 06:47:46 -0500 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) by mx1.redhat.com (Postfix) with ESMTPS id B99A280511 for ; Thu, 4 Feb 2016 11:47:45 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u14Blg7l002812; Thu, 4 Feb 2016 06:47:44 -0500 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Thu, 4 Feb 2016 12:47:28 +0100 Message-Id: <1454586455-10202-2-git-send-email-imammedo@redhat.com> In-Reply-To: <1454586455-10202-1-git-send-email-imammedo@redhat.com> References: <1454586455-10202-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.27 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: pbonzini@redhat.com, ehabkost@redhat.com, mst@redhat.com Subject: [Qemu-devel] [PATCH 2/9] machine: introduce MachineClass.possible_cpu_arch_ids() hook X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP on x86 currently range 0..max_cpus is used to generate architecture-dependent CPU ID (APIC Id) for each present and possible CPUs. However architecture-dependent CPU IDs list could be sparse and code that needs to enumerate all IDs (ACPI) ended up doing guess work enumerating all possible and impossible IDs up to apic_id_limit = x86_cpu_apic_id_from_index(max_cpus). That leads to creation of MADT entries and Processor objects in ACPI tables for not possible CPUs. Fix it by allowing board specify a concrete list of CPU IDs accourding its own rules (which for x86 depends on topology). So that code that needs this list could request it from board instead of trying to figure out what IDs are correct on its own. Signed-off-by: Igor Mammedov --- hw/i386/pc.c | 16 ++++++++++++++++ include/hw/boards.h | 18 ++++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index d72246d..2fd8fc8 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1946,6 +1946,21 @@ static unsigned pc_cpu_index_to_socket_id(unsigned cpu_index) return topo.pkg_id; } +static GArray *pc_possible_cpu_arch_ids(void) +{ + int i; + GArray *list = g_array_new (FALSE, FALSE, sizeof (CPUArchId)); + + for (i = 0; i < max_cpus; i++) { + CPUArchId val; + + val.arch_id = x86_cpu_apic_id_from_index(i); + val.cpu = qemu_get_cpu_by_arch_id(val.arch_id); + g_array_append_val(list, val); + } + return list; +} + static void pc_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); @@ -1968,6 +1983,7 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) pcmc->save_tsc_khz = true; mc->get_hotplug_handler = pc_get_hotpug_handler; mc->cpu_index_to_socket_id = pc_cpu_index_to_socket_id; + mc->possible_cpu_arch_ids = pc_possible_cpu_arch_ids; mc->default_boot_order = "cad"; mc->hot_add_cpu = pc_hot_add_cpu; mc->max_cpus = 255; diff --git a/include/hw/boards.h b/include/hw/boards.h index 0f30959..bd85f46 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -8,6 +8,7 @@ #include "sysemu/accel.h" #include "hw/qdev.h" #include "qom/object.h" +#include "qom/cpu.h" void memory_region_allocate_system_memory(MemoryRegion *mr, Object *owner, const char *name, @@ -42,6 +43,16 @@ bool machine_dump_guest_core(MachineState *machine); bool machine_mem_merge(MachineState *machine); /** + * CPUArchId: + * @arch_id - architecture-dependent CPU ID of present or possible CPU + * @cpu - pointer to corresponding CPU object ii it's present on NULL otherwise + */ +typedef struct { + uint64_t arch_id; + struct CPUState *cpu; +} CPUArchId; + +/** * MachineClass: * @get_hotplug_handler: this function is called during bus-less * device hotplug. If defined it returns pointer to an instance @@ -57,6 +68,10 @@ bool machine_mem_merge(MachineState *machine); * Set only by old machines because they need to keep * compatibility on code that exposed QEMU_VERSION to guests in * the past (and now use qemu_hw_version()). + * @possible_cpu_arch_ids: + * Returns an array of @CPUArchId architecture-dependent CPU IDs + * which includes CPU IDs for present and possible to hotplug CPUs. + * Caller is responsible for freeing returned list. */ struct MachineClass { /*< private >*/ @@ -99,8 +114,11 @@ struct MachineClass { HotplugHandler *(*get_hotplug_handler)(MachineState *machine, DeviceState *dev); unsigned (*cpu_index_to_socket_id)(unsigned cpu_index); + GArray *(*possible_cpu_arch_ids)(void); }; +#define FETCH_CPU_ARCH_ID(array, idx) g_array_index(array, CPUArchId, idx) + /** * MachineState: */