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Tue, 29 Mar 2016 15:48:58 +0800 (CST) From: xiaoqiang zhao To: qemu-devel@nongnu.org Date: Tue, 29 Mar 2016 15:47:23 +0800 Message-Id: <1459237645-17227-5-git-send-email-zxq_yx_007@163.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1459237645-17227-1-git-send-email-zxq_yx_007@163.com> References: <1459237645-17227-1-git-send-email-zxq_yx_007@163.com> X-CM-TRANSID: EsCowEA5HERdM_pWCG9bAA--.33092S6 X-Coremail-Antispam: 1Uf129KBjvJXoW7tw47AFWDXw1DGw1UZrWDurg_yoW8Aw17pF yDCFn8Crs5KF4DZr4xJF1UGFs5twn3Jrnrt34xJrsa9asrCryDtFn0k3yavFW2qaykCFyr Zay8JryxAa1UA3DanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07j4T5dUUUUU= X-Originating-IP: [118.187.28.42] X-CM-SenderInfo: 520ts5t0bqili6rwjhhfrp/xtbBEgs7xlZXw5t9UAAAsQ X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x X-Received-From: 220.181.12.18 Cc: cornelia.huck@de.ibm.com, pbonzini@redhat.com, michael@walle.cc, agraf@suse.de, edgar.iglesias@gmail.com Subject: [Qemu-devel] [PATCH v2 4/6] hw/char: QOM'ify lm32_uart.c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Drop the old SysBus init function and use instance_init Signed-off-by: xiaoqiang zhao Acked-by: Michael Walle Tested-by: Michael Walle --- hw/char/lm32_uart.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/hw/char/lm32_uart.c b/hw/char/lm32_uart.c index 036813d..f29054b 100644 --- a/hw/char/lm32_uart.c +++ b/hw/char/lm32_uart.c @@ -249,13 +249,14 @@ static void uart_reset(DeviceState *d) s->regs[R_LSR] = LSR_THRE | LSR_TEMT; } -static int lm32_uart_init(SysBusDevice *dev) +static void lm32_uart_init(Object *obj) { - LM32UartState *s = LM32_UART(dev); + LM32UartState *s = LM32_UART(obj); + SysBusDevice *dev = SYS_BUS_DEVICE(obj); sysbus_init_irq(dev, &s->irq); - memory_region_init_io(&s->iomem, OBJECT(s), &uart_ops, s, + memory_region_init_io(&s->iomem, obj, &uart_ops, s, "uart", R_MAX * 4); sysbus_init_mmio(dev, &s->iomem); @@ -264,8 +265,6 @@ static int lm32_uart_init(SysBusDevice *dev) if (s->chr) { qemu_chr_add_handlers(s->chr, uart_can_rx, uart_rx, uart_event, s); } - - return 0; } static const VMStateDescription vmstate_lm32_uart = { @@ -281,9 +280,7 @@ static const VMStateDescription vmstate_lm32_uart = { static void lm32_uart_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); - k->init = lm32_uart_init; dc->reset = uart_reset; dc->vmsd = &vmstate_lm32_uart; /* Reason: init() method uses qemu_char_get_next_serial() */ @@ -294,6 +291,7 @@ static const TypeInfo lm32_uart_info = { .name = TYPE_LM32_UART, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(LM32UartState), + .instance_init = lm32_uart_init, .class_init = lm32_uart_class_init, };