From patchwork Thu Apr 14 15:14:52 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Huth X-Patchwork-Id: 8838461 Return-Path: X-Original-To: patchwork-qemu-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id EB5809F3A0 for ; Thu, 14 Apr 2016 15:16:53 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0921820272 for ; Thu, 14 Apr 2016 15:16:53 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 503D72025A for ; Thu, 14 Apr 2016 15:16:52 +0000 (UTC) Received: from localhost ([::1]:41524 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aqj0l-0005fn-Lf for patchwork-qemu-devel@patchwork.kernel.org; Thu, 14 Apr 2016 11:16:51 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56030) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aqiyy-0002gz-Ig for qemu-devel@nongnu.org; Thu, 14 Apr 2016 11:15:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aqiyx-0006ke-B9 for qemu-devel@nongnu.org; Thu, 14 Apr 2016 11:15:00 -0400 Received: from mx1.redhat.com ([209.132.183.28]:34781) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aqiyx-0006kZ-5l; Thu, 14 Apr 2016 11:14:59 -0400 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D62FAD6D2A; Thu, 14 Apr 2016 15:14:58 +0000 (UTC) Received: from thh440s.fritz.box (vpn1-6-40.ams2.redhat.com [10.36.6.40]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u3EFEsxx032457; Thu, 14 Apr 2016 11:14:57 -0400 From: Thomas Huth To: Alexander Graf , qemu-ppc@nongnu.org Date: Thu, 14 Apr 2016 17:14:52 +0200 Message-Id: <1460646893-32622-2-git-send-email-thuth@redhat.com> In-Reply-To: <1460646893-32622-1-git-send-email-thuth@redhat.com> References: <1460646893-32622-1-git-send-email-thuth@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Thu, 14 Apr 2016 15:14:58 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 1/2] ppc: Fix the range check in the LSWI instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, mark.cave-ayland@ilande.co.uk, qemu-devel@nongnu.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP There are two issues: First, the number of registers that are used has to be calculated with "(nb + 3) / 4" (i.e. round always up, not down). Second, the "start <= ra && (start + nr - 32) > ra" condition for the wrap-around case is wrong: It has to be tested with "||" instead of "&&". Since we can reuse this check later for the LSWX instruction, let's place the fixed code into a helper function, too. Signed-off-by: Thomas Huth --- target-ppc/cpu.h | 10 ++++++++++ target-ppc/translate.c | 6 ++---- 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 9d4e43c..5282533 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -2415,6 +2415,16 @@ static inline bool msr_is_64bit(CPUPPCState *env, target_ulong msr) return msr & (1ULL << MSR_SF); } +/** + * Check whether register rx is in the range between start and + * start + nregs (as needed by the LSWX and LSWI instructions) + */ +static inline bool lsw_reg_in_range(int start, int nregs, int rx) +{ + return (start + nregs <= 32 && rx >= start && rx < start + nregs) || + (start + nregs > 32 && (rx >= start || rx < start + nregs - 32)); +} + extern void (*cpu_ppc_hypercall)(PowerPCCPU *); #include "exec/exec-all.h" diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 6f0e7b4..b3860ec 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -3227,10 +3227,8 @@ static void gen_lswi(DisasContext *ctx) if (nb == 0) nb = 32; - nr = nb / 4; - if (unlikely(((start + nr) > 32 && - start <= ra && (start + nr - 32) > ra) || - ((start + nr) <= 32 && start <= ra && (start + nr) > ra))) { + nr = (nb + 3) / 4; + if (unlikely(lsw_reg_in_range(start, nr, ra))) { gen_inval_exception(ctx, POWERPC_EXCP_INVAL_LSWX); return; }