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[81.231.233.234]) by smtp.gmail.com with ESMTPSA id c16sm3013601wme.16.2016.04.29.05.08.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 29 Apr 2016 05:08:09 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Fri, 29 Apr 2016 14:08:00 +0200 Message-Id: <1461931684-1867-4-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1461931684-1867-1-git-send-email-edgar.iglesias@gmail.com> References: <1461931684-1867-1-git-send-email-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a00:1450:400c:c09::242 Subject: [Qemu-devel] [PATCH v3 3/7] target-arm: Add the IL flag to syn_data_abort X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, serge.fdrv@gmail.com, qemu-arm@nongnu.org, alex.bennee@linaro.org, rth@twiddle.net Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: "Edgar E. Iglesias" Add the IL flag to syn_data_abort(). Since we at the moment never set ISV, the IL flag is always set to one. Signed-off-by: Edgar E. Iglesias --- target-arm/internals.h | 4 +++- target-arm/op_helper.c | 6 ++++-- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/target-arm/internals.h b/target-arm/internals.h index 2e70272..34e2688 100644 --- a/target-arm/internals.h +++ b/target-arm/internals.h @@ -384,9 +384,11 @@ static inline uint32_t syn_insn_abort(int same_el, int ea, int s1ptw, int fsc) } static inline uint32_t syn_data_abort(int same_el, int ea, int cm, int s1ptw, - int wnr, int fsc) + int wnr, int fsc, + bool is_16bit) { return (EC_DATAABORT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT) + | (is_16bit ? 0 : ARM_EL_IL) | (ea << 9) | (cm << 8) | (s1ptw << 7) | (wnr << 6) | fsc; } diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c index d626ff1..e69c1de 100644 --- a/target-arm/op_helper.c +++ b/target-arm/op_helper.c @@ -115,7 +115,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx, syn = syn_insn_abort(same_el, 0, fi.s1ptw, syn); exc = EXCP_PREFETCH_ABORT; } else { - syn = syn_data_abort(same_el, 0, 0, fi.s1ptw, is_write == 1, syn); + syn = syn_data_abort(same_el, 0, 0, fi.s1ptw, is_write == 1, syn, + 1); if (is_write == 1 && arm_feature(env, ARM_FEATURE_V6)) { fsr |= (1 << 11); } @@ -161,7 +162,8 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, int is_write, } raise_exception(env, EXCP_DATA_ABORT, - syn_data_abort(same_el, 0, 0, 0, is_write == 1, 0x21), + syn_data_abort(same_el, 0, 0, 0, is_write == 1, 0x21, + 1), target_el); }