From patchwork Tue May 17 01:41:18 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cao jin X-Patchwork-Id: 9107321 Return-Path: X-Original-To: patchwork-qemu-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id EAC049F30C for ; Tue, 17 May 2016 01:37:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4DA0020268 for ; Tue, 17 May 2016 01:37:55 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5AA0C2012D for ; Tue, 17 May 2016 01:37:54 +0000 (UTC) Received: from localhost ([::1]:48007 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b2TxJ-0003ne-4K for patchwork-qemu-devel@patchwork.kernel.org; Mon, 16 May 2016 21:37:53 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47705) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b2TxC-0003gt-Mf for qemu-devel@nongnu.org; Mon, 16 May 2016 21:37:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b2Tx8-0004zj-In for qemu-devel@nongnu.org; Mon, 16 May 2016 21:37:46 -0400 Received: from [59.151.112.132] (port=9389 helo=heian.cn.fujitsu.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b2Tx8-0004x6-5S; Mon, 16 May 2016 21:37:42 -0400 X-IronPort-AV: E=Sophos;i="5.22,518,1449504000"; d="scan'208";a="6609136" Received: from unknown (HELO cn.fujitsu.com) ([10.167.33.5]) by heian.cn.fujitsu.com with ESMTP; 17 May 2016 09:37:26 +0800 Received: from G08CNEXCHPEKD03.g08.fujitsu.local (unknown [10.167.33.85]) by cn.fujitsu.com (Postfix) with ESMTP id A3797489F962; Tue, 17 May 2016 09:37:23 +0800 (CST) Received: from G08FNSTD140223.g08.fujitsu.local (10.167.226.69) by G08CNEXCHPEKD03.g08.fujitsu.local (10.167.33.89) with Microsoft SMTP Server (TLS) id 14.3.279.2; Tue, 17 May 2016 09:37:23 +0800 From: Cao jin To: Date: Tue, 17 May 2016 09:41:18 +0800 Message-ID: <1463449278-16060-1-git-send-email-caoj.fnst@cn.fujitsu.com> X-Mailer: git-send-email 2.1.0 MIME-Version: 1.0 X-Originating-IP: [10.167.226.69] X-yoursite-MailScanner-ID: A3797489F962.A9E53 X-yoursite-MailScanner: Found to be clean X-yoursite-MailScanner-From: caoj.fnst@cn.fujitsu.com X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 59.151.112.132 Subject: [Qemu-devel] [PATCH] ICH9: fix typo X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-trivial@nongnu.org, marcel@redhat.com, mst@redhat.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Cao jin --- it is 4th attempt to send this patch... because of it wasn't delivered correctly by eggs.gnu.org hw/isa/lpc_ich9.c | 4 ++-- include/hw/i386/ich9.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c index 99cd3ba..fafe367 100644 --- a/hw/isa/lpc_ich9.c +++ b/hw/isa/lpc_ich9.c @@ -96,8 +96,8 @@ static void ich9_cc_update(ICH9LPCState *lpc) /* * D30: DMI2PCI bridge - * It is arbitrarily decided how INTx lines of PCI devicesbehind the bridge - * are connected to pirq lines. Our choice is PIRQ[E-H]. + * It is arbitrarily decided how INTx lines of PCI devices behind + * the bridge are connected to pirq lines. Our choice is PIRQ[E-H]. * INT[A-D] are connected to PIRQ[E-H] */ for (pci_intx = 0; pci_intx < PCI_NUM_PINS; pci_intx++) { diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h index d04dcdc..88233c3 100644 --- a/include/hw/i386/ich9.h +++ b/include/hw/i386/ich9.h @@ -35,7 +35,7 @@ typedef struct ICH9LPCState { /* (pci device, intx) -> pirq * In real chipset case, the unused slots are never used - * as ICH9 supports only D25-D32 irq routing. + * as ICH9 supports only D25-D31 irq routing. * On the other hand in qemu case, any slot/function can be populated * via command line option. * So fallback interrupt routing for any devices in any slots is necessary. @@ -181,7 +181,7 @@ Object *ich9_lpc_find(void); #define ICH9_SATA1_DEV 31 #define ICH9_SATA1_FUNC 2 -/* D30:F1 power management I/O registers +/* D31:F0 power management I/O registers offset from the address ICH9_LPC_PMBASE */ /* ICH9 LPC PM I/O registers are 128 ports and 128-aligned */