From patchwork Fri Jul 15 15:39:38 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Huth X-Patchwork-Id: 9232241 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id EFE5860868 for ; Fri, 15 Jul 2016 15:42:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DF6F82715B for ; Fri, 15 Jul 2016 15:42:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D09EA27FA4; Fri, 15 Jul 2016 15:42:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6E75C2715B for ; Fri, 15 Jul 2016 15:42:15 +0000 (UTC) Received: from localhost ([::1]:33289 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bO5Fm-0008QC-57 for patchwork-qemu-devel@patchwork.kernel.org; Fri, 15 Jul 2016 11:42:14 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40729) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bO5DQ-0007Eb-Ts for qemu-devel@nongnu.org; Fri, 15 Jul 2016 11:39:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bO5DP-0008Bf-HV for qemu-devel@nongnu.org; Fri, 15 Jul 2016 11:39:48 -0400 Received: from mx1.redhat.com ([209.132.183.28]:49285) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bO5DP-0008Bb-9K for qemu-devel@nongnu.org; Fri, 15 Jul 2016 11:39:47 -0400 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id CDA467F340; Fri, 15 Jul 2016 15:39:46 +0000 (UTC) Received: from thh440s.redhat.com (ovpn-116-26.ams2.redhat.com [10.36.116.26]) by int-mx11.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u6FFdebr031513; Fri, 15 Jul 2016 11:39:44 -0400 From: Thomas Huth To: qemu-devel@nongnu.org, Paolo Bonzini Date: Fri, 15 Jul 2016 17:39:38 +0200 Message-Id: <1468597179-8337-2-git-send-email-thuth@redhat.com> In-Reply-To: <1468597179-8337-1-git-send-email-thuth@redhat.com> References: <1468597179-8337-1-git-send-email-thuth@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.24 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Fri, 15 Jul 2016 15:39:46 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 1/2] tests: Resort check-qtest entries in Makefile.include X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , Peter Crosthwaite , Markus Armbruster , david@gibson.dropbear.id.au, Richard Henderson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP The rather random list of check-qtest-xxx entries caused some confusion in the past, where to use "=" and where to use "+=" (see commits 0ccac16f59462b8e2b9afbc1 and 1f5c1cfbaec0792cd2e5da for example). Sorting the check-qtest-xxx entries by architecure instead and using some empty lines inbetween should help to ease this situation a little bit, so that it is hopefully now obvious that new tests should be added with "+=" instead of "=". While we are at it, this patch also comments out two of the "gcov-files-..." lines since the corresponding m48t59-test is disabled for sparc and sparc64, too. Signed-off-by: Thomas Huth Reviewed-by: David Gibson --- tests/Makefile.include | 38 +++++++++++++++++++++++++------------- 1 file changed, 25 insertions(+), 13 deletions(-) diff --git a/tests/Makefile.include b/tests/Makefile.include index 2010b11..3d76cf4 100644 --- a/tests/Makefile.include +++ b/tests/Makefile.include @@ -240,33 +240,45 @@ check-qtest-i386-y += tests/postcopy-test$(EXESUF) check-qtest-x86_64-y += $(check-qtest-i386-y) gcov-files-i386-y += i386-softmmu/hw/timer/mc146818rtc.c gcov-files-x86_64-y = $(subst i386-softmmu/,x86_64-softmmu/,$(gcov-files-i386-y)) + check-qtest-mips-y = tests/endianness-test$(EXESUF) + check-qtest-mips64-y = tests/endianness-test$(EXESUF) + check-qtest-mips64el-y = tests/endianness-test$(EXESUF) + check-qtest-ppc-y = tests/endianness-test$(EXESUF) -check-qtest-ppc64-y = tests/endianness-test$(EXESUF) +check-qtest-ppc-y += tests/boot-order-test$(EXESUF) +check-qtest-ppc-y += tests/prom-env-test$(EXESUF) + +check-qtest-ppc64-y = tests/spapr-phb-test$(EXESUF) +gcov-files-ppc64-y = ppc64-softmmu/hw/ppc/spapr_pci.c +check-qtest-ppc64-y += tests/endianness-test$(EXESUF) +check-qtest-ppc64-y += tests/boot-order-test$(EXESUF) +check-qtest-ppc64-y += tests/prom-env-test$(EXESUF) + check-qtest-sh4-y = tests/endianness-test$(EXESUF) + check-qtest-sh4eb-y = tests/endianness-test$(EXESUF) + +check-qtest-sparc-y = tests/prom-env-test$(EXESUF) +#check-qtest-sparc-y += tests/m48t59-test$(EXESUF) +#gcov-files-sparc-y = hw/timer/m48t59.c + check-qtest-sparc64-y = tests/endianness-test$(EXESUF) -#check-qtest-sparc-y = tests/m48t59-test$(EXESUF) #check-qtest-sparc64-y += tests/m48t59-test$(EXESUF) -gcov-files-sparc-y += hw/timer/m48t59.c -gcov-files-sparc64-y += hw/timer/m48t59.c +#gcov-files-sparc64-y += hw/timer/m48t59.c +#Disabled for now, triggers a TCG bug on 32-bit hosts +#check-qtest-sparc64-y += tests/prom-env-test$(EXESUF) + check-qtest-arm-y = tests/tmp105-test$(EXESUF) check-qtest-arm-y += tests/ds1338-test$(EXESUF) gcov-files-arm-y += hw/misc/tmp105.c check-qtest-arm-y += tests/virtio-blk-test$(EXESUF) gcov-files-arm-y += arm-softmmu/hw/block/virtio-blk.c -check-qtest-ppc-y += tests/boot-order-test$(EXESUF) -check-qtest-ppc64-y += tests/boot-order-test$(EXESUF) -check-qtest-ppc64-y += tests/spapr-phb-test$(EXESUF) -gcov-files-ppc64-y += ppc64-softmmu/hw/ppc/spapr_pci.c -check-qtest-ppc-y += tests/prom-env-test$(EXESUF) -check-qtest-ppc64-y += tests/prom-env-test$(EXESUF) -check-qtest-sparc-y += tests/prom-env-test$(EXESUF) -#Disabled for now, triggers a TCG bug on 32-bit hosts -#check-qtest-sparc64-y += tests/prom-env-test$(EXESUF) + check-qtest-microblazeel-y = $(check-qtest-microblaze-y) + check-qtest-xtensaeb-y = $(check-qtest-xtensa-y) check-qtest-generic-y += tests/qom-test$(EXESUF)