From patchwork Thu Sep 15 06:14:26 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Fleytman X-Patchwork-Id: 9332837 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 386D06077F for ; Thu, 15 Sep 2016 06:16:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2A2BE2929C for ; Thu, 15 Sep 2016 06:16:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1F2672929F; Thu, 15 Sep 2016 06:16:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B47C52929C for ; Thu, 15 Sep 2016 06:16:54 +0000 (UTC) Received: from localhost ([::1]:60063 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bkPyf-0003n5-MJ for patchwork-qemu-devel@patchwork.kernel.org; Thu, 15 Sep 2016 02:16:53 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47192) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bkPy0-0003l8-Ak for qemu-devel@nongnu.org; Thu, 15 Sep 2016 02:16:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bkPxy-0001C4-Gr for qemu-devel@nongnu.org; Thu, 15 Sep 2016 02:16:11 -0400 Received: from mail-wm0-f67.google.com ([74.125.82.67]:32866) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bkPxy-00017j-BE for qemu-devel@nongnu.org; Thu, 15 Sep 2016 02:16:10 -0400 Received: by mail-wm0-f67.google.com with SMTP id b187so5452354wme.0 for ; Wed, 14 Sep 2016 23:15:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daynix-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=FdPvmvEQ53njuVxsBXZK3NHz8VbhbXgnGq6jG4iKRng=; b=duAzNkeRxbpwPVMA/yqNn5iVGzaWd/xTFShmze/9HDnK0OIKLjl5Mj1A6QWMs/sVHF 5HSacpDxiQI0jW0PogJyez61vEgSACMPUnyyLqRcKQ0v/NG1ivikgIRX7h7ZRiSk/Vpv 4m/J54iGb/IkZuUHKtIGYdJmIhGzKY36HYPbARh3fjU6T/0g57IOkHM1keCVucMO0qmq MmHSWH0j0xFEoyZI6w6o85ordYR6QrZ8bxDjtYd7Svp43V1VAnN5KUNnSA08tM3/tVHY YOc2mnLgiS5JNV2ftVpLOWAfDoXq1zhOymWFLTaH23ud6EmFnU3sJHJ26d06Jqqi2iXu lKMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=FdPvmvEQ53njuVxsBXZK3NHz8VbhbXgnGq6jG4iKRng=; b=OcLdRPdnBk7fq4L8TiVXTX8L4tToOfS7Zoq5G0wErRJj6xb8qEoYSNof6fGgEz+qk9 VRj0WH1frcvYdFhJAnP7KKXscz2xZ4XWubFF+PvtWVGpyI5X/fmwd42Vi7PRSy3mgUzQ r4BpUbyn6wogAjPYphbj81/oP0e0n3PA3LloER+6ac2ucQQwCFjXV4JIaDSotUdJ8WQW FSX9mh5jf11FOqgDHY7431yKkqPo7ojQCIltqIktjIjqDgNEUoLUnLiiA/sKHVxBr8uq 7OeLsxMOmRw08WtuYk+J6xNlEK2XnaoQ0FeKBnJ+4cTDWbmvaK4tTa0eocH1oJDnHEH0 IcEQ== X-Gm-Message-State: AE9vXwOA4K/uyaA3eZs6TduuezZmgINwEmgLLDExMgCM56wFEpWgpuO4F70etIuDA/mRZw== X-Received: by 10.28.208.199 with SMTP id h190mr1162690wmg.17.1473920088424; Wed, 14 Sep 2016 23:14:48 -0700 (PDT) Received: from bark.daynix ([141.226.163.133]) by smtp.gmail.com with ESMTPSA id jd4sm1732011wjb.6.2016.09.14.23.14.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 14 Sep 2016 23:14:47 -0700 (PDT) From: Dmitry Fleytman To: qemu-devel@nongnu.org Date: Thu, 15 Sep 2016 09:14:26 +0300 Message-Id: <1473920070-21938-4-git-send-email-dmitry@daynix.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1473920070-21938-1-git-send-email-dmitry@daynix.com> References: <1473920070-21938-1-git-send-email-dmitry@daynix.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 74.125.82.67 Subject: [Qemu-devel] [PATCH 3/7] e1000e: Fix CTRL_EXT.EIAME behavior X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yan Vugenfirer , Jason Wang , Shmulik Ladkani Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP CTRL_EXT.EIAME bit controls clearing of IAM bits, but current code clears IMS bits instead. See spec. 10.2.2.5 Extended Device Control Register. Signed-off-by: Dmitry Fleytman --- hw/net/e1000e_core.c | 4 ++-- hw/net/trace-events | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/net/e1000e_core.c b/hw/net/e1000e_core.c index a9603e0..22765cb 100644 --- a/hw/net/e1000e_core.c +++ b/hw/net/e1000e_core.c @@ -2008,8 +2008,8 @@ e1000e_msix_notify_one(E1000ECore *core, uint32_t cause, uint32_t int_cfg) } if (core->mac[CTRL_EXT] & E1000_CTRL_EXT_EIAME) { - trace_e1000e_irq_ims_clear_eiame(core->mac[IAM], cause); - e1000e_clear_ims_bits(core, core->mac[IAM] & cause); + trace_e1000e_irq_iam_clear_eiame(core->mac[IAM], cause); + core->mac[IAM] &= ~cause; } trace_e1000e_irq_icr_clear_eiac(core->mac[ICR], core->mac[EIAC]); diff --git a/hw/net/trace-events b/hw/net/trace-events index 8d38d77..aa83a7c 100644 --- a/hw/net/trace-events +++ b/hw/net/trace-events @@ -223,7 +223,7 @@ e1000e_irq_icr_read_entry(uint32_t icr) "Starting ICR read. Current ICR: 0x%x" e1000e_irq_icr_read_exit(uint32_t icr) "Ending ICR read. Current ICR: 0x%x" e1000e_irq_icr_clear_zero_ims(void) "Clearing ICR on read due to zero IMS" e1000e_irq_icr_clear_iame(void) "Clearing ICR on read due to IAME" -e1000e_irq_ims_clear_eiame(uint32_t iam, uint32_t cause) "Clearing IMS due to EIAME, IAM: 0x%X, cause: 0x%X" +e1000e_irq_iam_clear_eiame(uint32_t iam, uint32_t cause) "Clearing IMS due to EIAME, IAM: 0x%X, cause: 0x%X" e1000e_irq_icr_clear_eiac(uint32_t icr, uint32_t eiac) "Clearing ICR bits due to EIAC, ICR: 0x%X, EIAC: 0x%X" e1000e_irq_ims_clear_set_imc(uint32_t val) "Clearing IMS bits due to IMC write 0x%x" e1000e_irq_fire_delayed_interrupts(void) "Firing delayed interrupts"