[PULL,10/23] target-m68k: allow to update flags with operation on words and bytes

Message ID	1477422199-11208-11-git-send-email-laurent@vivier.eu (mailing list archive)
State	New, archived
Headers	show Return-Path: <qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org> From: Laurent Vivier <laurent@vivier.eu> To: qemu-devel@nongnu.org Date: Tue, 25 Oct 2016 21:03:06 +0200 Message-Id: <1477422199-11208-11-git-send-email-laurent@vivier.eu> In-Reply-To: <1477422199-11208-1-git-send-email-laurent@vivier.eu> References: <1477422199-11208-1-git-send-email-laurent@vivier.eu> Subject: [Qemu-devel] [PULL 10/23] target-m68k: allow to update flags with operation on words and bytes Precedence: list Cc: Laurent Vivier <laurent@vivier.eu>, gerg@uclinux.org, schwab@linux-m68k.org, agraf@suse.de, Richard Henderson <rth@twiddle.net> Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org>

diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h index fa1d027..18b6930 100644 --- a/target-m68k/cpu.h +++ b/target-m68k/cpu.h @@ -173,13 +173,23 @@ void cpu_m68k_flush_flags(CPUM68KState *, int); enum { CC_OP_DYNAMIC, /* Use env->cc_op */ CC_OP_FLAGS, /* CC_DEST = CVZN, CC_SRC = unused */ + CC_OP_LOGICB, /* CC_DEST = result, CC_SRC = unused */ + CC_OP_LOGICW, /* CC_DEST = result, CC_SRC = unused */ CC_OP_LOGIC, /* CC_DEST = result, CC_SRC = unused */ + CC_OP_ADDB, /* CC_DEST = result, CC_SRC = source */ + CC_OP_ADDW, /* CC_DEST = result, CC_SRC = source */ CC_OP_ADD, /* CC_DEST = result, CC_SRC = source */ + CC_OP_SUBB, /* CC_DEST = result, CC_SRC = source */ + CC_OP_SUBW, /* CC_DEST = result, CC_SRC = source */ CC_OP_SUB, /* CC_DEST = result, CC_SRC = source */ - CC_OP_CMPB, /* CC_DEST = result, CC_SRC = source */ - CC_OP_CMPW, /* CC_DEST = result, CC_SRC = source */ + CC_OP_ADDXB, /* CC_DEST = result, CC_SRC = source */ + CC_OP_ADDXW, /* CC_DEST = result, CC_SRC = source */ CC_OP_ADDX, /* CC_DEST = result, CC_SRC = source */ + CC_OP_SUBXB, /* CC_DEST = result, CC_SRC = source */ + CC_OP_SUBXW, /* CC_DEST = result, CC_SRC = source */ CC_OP_SUBX, /* CC_DEST = result, CC_SRC = source */ + CC_OP_SHIFTB, /* CC_DEST = result, CC_SRC = carry */ + CC_OP_SHIFTW, /* CC_DEST = result, CC_SRC = carry */ CC_OP_SHIFT, /* CC_DEST = result, CC_SRC = carry */ }; diff --git a/target-m68k/helper.c b/target-m68k/helper.c index 89bbe6d..4fe36b8 100644 --- a/target-m68k/helper.c +++ b/target-m68k/helper.c @@ -140,22 +140,63 @@ void cpu_m68k_flush_flags(CPUM68KState *env, int cc_op) uint32_t dest; uint32_t tmp; -#define HIGHBIT 0x80000000u - -#define SET_NZ(x) do { \ - if ((x) == 0) \ - flags |= CCF_Z; \ - else if ((int32_t)(x) < 0) \ - flags |= CCF_N; \ +#define HIGHBIT(type) (1u << (sizeof(type) * 8 - 1)) + +#define SET_NZ(x, type) do { \ + if ((type)(x) == 0) { \ + flags |= CCF_Z; \ + } else if ((type)(x) < 0) { \ + flags |= CCF_N; \ + } \ } while (0) #define SET_FLAGS_SUB(type, utype) do { \ - SET_NZ((type)dest); \ - tmp = dest + src; \ - if ((utype) tmp < (utype) src) \ - flags |= CCF_C; \ - if ((1u << (sizeof(type) * 8 - 1)) & (tmp ^ dest) & (tmp ^ src)) \ - flags |= CCF_V; \ + SET_NZ(dest, type); \ + tmp = dest + src; \ + if ((utype) tmp < (utype) src) { \ + flags |= CCF_C; \ + } \ + if (HIGHBIT(type) & (tmp ^ dest) & (tmp ^ src)) { \ + flags |= CCF_V; \ + } \ + } while (0) + +#define SET_FLAGS_ADD(type, utype) do { \ + SET_NZ(dest, type); \ + if ((utype) dest < (utype) src) { \ + flags |= CCF_C; \ + } \ + tmp = dest - src; \ + if (HIGHBIT(type) & (src ^ dest) & ~(tmp ^ src)) { \ + flags |= CCF_V; \ + } \ + } while (0) + +#define SET_FLAGS_ADDX(type, utype) do { \ + SET_NZ(dest, type); \ + if ((utype) dest <= (utype) src) { \ + flags |= CCF_C; \ + } \ + tmp = dest - src - 1; \ + if (HIGHBIT(type) & (src ^ dest) & ~(tmp ^ src)) { \ + flags |= CCF_V; \ + } \ + } while (0) + +#define SET_FLAGS_SUBX(type, utype) do { \ + SET_NZ(dest, type); \ + tmp = dest + src + 1; \ + if ((utype) tmp <= (utype) src) { \ + flags |= CCF_C; \ + } \ + if (HIGHBIT(type) & (tmp ^ dest) & (tmp ^ src)) { \ + flags |= CCF_V; \ + } \ + } while (0) + +#define SET_FLAGS_SHIFT(type) do { \ + SET_NZ(dest, type); \ + flags |= src; \ } while (0) flags = 0; @@ -165,46 +206,66 @@ void cpu_m68k_flush_flags(CPUM68KState *env, int cc_op) case CC_OP_FLAGS: flags = dest; break; + case CC_OP_LOGICB: + SET_NZ(dest, int8_t); + goto set_x; + break; + case CC_OP_LOGICW: + SET_NZ(dest, int16_t); + goto set_x; + break; case CC_OP_LOGIC: - SET_NZ(dest); + SET_NZ(dest, int32_t); +set_x: + if (!m68k_feature(env, M68K_FEATURE_M68000)) { + /* Unlike m68k, coldfire always clears the overflow bit. */ + env->cc_x = 0; + } + break; + case CC_OP_ADDB: + SET_FLAGS_ADD(int8_t, uint8_t); + break; + case CC_OP_ADDW: + SET_FLAGS_ADD(int16_t, uint16_t); break; case CC_OP_ADD: - SET_NZ(dest); - if (dest < src) - flags |= CCF_C; - tmp = dest - src; - if (HIGHBIT & (src ^ dest) & ~(tmp ^ src)) - flags |= CCF_V; + SET_FLAGS_ADD(int32_t, uint32_t); + break; + case CC_OP_SUBB: + SET_FLAGS_SUB(int8_t, uint8_t); + break; + case CC_OP_SUBW: + SET_FLAGS_SUB(int16_t, uint16_t); break; case CC_OP_SUB: SET_FLAGS_SUB(int32_t, uint32_t); break; - case CC_OP_CMPB: - SET_FLAGS_SUB(int8_t, uint8_t); + case CC_OP_ADDXB: + SET_FLAGS_ADDX(int8_t, uint8_t); break; - case CC_OP_CMPW: - SET_FLAGS_SUB(int16_t, uint16_t); + case CC_OP_ADDXW: + SET_FLAGS_ADDX(int16_t, uint16_t); break; case CC_OP_ADDX: - SET_NZ(dest); - if (dest <= src) - flags |= CCF_C; - tmp = dest - src - 1; - if (HIGHBIT & (src ^ dest) & ~(tmp ^ src)) - flags |= CCF_V; + SET_FLAGS_ADDX(int32_t, uint32_t); + break; + case CC_OP_SUBXB: + SET_FLAGS_SUBX(int8_t, uint8_t); + break; + case CC_OP_SUBXW: + SET_FLAGS_SUBX(int16_t, uint16_t); break; case CC_OP_SUBX: - SET_NZ(dest); - tmp = dest + src + 1; - if (tmp <= src) - flags |= CCF_C; - if (HIGHBIT & (tmp ^ dest) & (tmp ^ src)) - flags |= CCF_V; + SET_FLAGS_SUBX(int32_t, uint32_t); + break; + case CC_OP_SHIFTB: + SET_FLAGS_SHIFT(int8_t); + break; + case CC_OP_SHIFTW: + SET_FLAGS_SHIFT(int16_t); break; case CC_OP_SHIFT: - SET_NZ(dest); - if (src) - flags |= CCF_C; + SET_FLAGS_SHIFT(int32_t); break; default: cpu_abort(CPU(cpu), "Bad CC_OP %d", cc_op); diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 50c55a4..e2f176e 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -428,10 +428,23 @@ static inline void gen_flush_flags(DisasContext *s) s->cc_op = CC_OP_FLAGS; } -static void gen_logic_cc(DisasContext *s, TCGv val) +#define SET_CC_OP(opsize, op) do { \ + switch (opsize) { \ + case OS_BYTE: \ + s->cc_op = CC_OP_##op##B; break; \ + case OS_WORD: \ + s->cc_op = CC_OP_##op##W; break; \ + case OS_LONG: \ + s->cc_op = CC_OP_##op; break; \ + default: \ + abort(); \ + } \ +} while (0) + +static void gen_logic_cc(DisasContext *s, TCGv val, int opsize) { tcg_gen_mov_i32(QREG_CC_DEST, val); - s->cc_op = CC_OP_LOGIC; + SET_CC_OP(opsize, LOGIC); } static void gen_update_cc_add(TCGv dest, TCGv src) @@ -933,8 +946,7 @@ DISAS_INSN(mulw) SRC_EA(env, src, OS_WORD, sign, NULL); tcg_gen_mul_i32(tmp, tmp, src); tcg_gen_mov_i32(reg, tmp); - /* Unlike m68k, coldfire always clears the overflow bit. */ - gen_logic_cc(s, tmp); + gen_logic_cc(s, tmp, OS_WORD); } DISAS_INSN(divw) @@ -1103,7 +1115,7 @@ DISAS_INSN(sats) reg = DREG(insn, 0); gen_flush_flags(s); gen_helper_sats(reg, reg, QREG_CC_DEST); - gen_logic_cc(s, reg); + gen_logic_cc(s, reg, OS_LONG); } static void gen_push(DisasContext *s, TCGv val) @@ -1228,11 +1240,11 @@ DISAS_INSN(arith_im) switch (op) { case 0: /* ori */ tcg_gen_ori_i32(dest, src1, im); - gen_logic_cc(s, dest); + gen_logic_cc(s, dest, OS_LONG); break; case 1: /* andi */ tcg_gen_andi_i32(dest, src1, im); - gen_logic_cc(s, dest); + gen_logic_cc(s, dest, OS_LONG); break; case 2: /* subi */ tcg_gen_mov_i32(dest, src1); @@ -1250,7 +1262,7 @@ DISAS_INSN(arith_im) break; case 5: /* eori */ tcg_gen_xori_i32(dest, src1, im); - gen_logic_cc(s, dest); + gen_logic_cc(s, dest, OS_LONG); break; case 6: /* cmpi */ tcg_gen_mov_i32(dest, src1); @@ -1307,7 +1319,7 @@ DISAS_INSN(move) dest_ea = ((insn >> 9) & 7) | (op << 3); DEST_EA(env, dest_ea, opsize, src, NULL); /* This will be correct because loads sign extend. */ - gen_logic_cc(s, src); + gen_logic_cc(s, src, opsize); } } @@ -1340,7 +1352,7 @@ DISAS_INSN(clr) opsize = insn_opsize(insn); DEST_EA(env, insn, opsize, tcg_const_i32(0), NULL); - gen_logic_cc(s, tcg_const_i32(0)); + gen_logic_cc(s, tcg_const_i32(0), opsize); } static TCGv gen_get_ccr(DisasContext *s) @@ -1427,7 +1439,7 @@ DISAS_INSN(not) reg = DREG(insn, 0); tcg_gen_not_i32(reg, reg); - gen_logic_cc(s, reg); + gen_logic_cc(s, reg, OS_LONG); } DISAS_INSN(swap) @@ -1442,7 +1454,7 @@ DISAS_INSN(swap) tcg_gen_shli_i32(src1, reg, 16); tcg_gen_shri_i32(src2, reg, 16); tcg_gen_or_i32(reg, src1, src2); - gen_logic_cc(s, reg); + gen_logic_cc(s, reg, OS_LONG); } DISAS_INSN(pea) @@ -1474,7 +1486,7 @@ DISAS_INSN(ext) gen_partset_reg(OS_WORD, reg, tmp); else tcg_gen_mov_i32(reg, tmp); - gen_logic_cc(s, tmp); + gen_logic_cc(s, tmp, OS_LONG); } DISAS_INSN(tst) @@ -1484,7 +1496,7 @@ DISAS_INSN(tst) opsize = insn_opsize(insn); SRC_EA(env, tmp, opsize, 1, NULL); - gen_logic_cc(s, tmp); + gen_logic_cc(s, tmp, opsize); } DISAS_INSN(pulse) @@ -1506,7 +1518,7 @@ DISAS_INSN(tas) dest = tcg_temp_new(); SRC_EA(env, src1, OS_BYTE, 1, &addr); - gen_logic_cc(s, src1); + gen_logic_cc(s, src1, OS_BYTE); tcg_gen_ori_i32(dest, src1, 0x80); DEST_EA(env, insn, OS_BYTE, dest, &addr); } @@ -1531,7 +1543,7 @@ DISAS_INSN(mull) tcg_gen_mul_i32(dest, src1, reg); tcg_gen_mov_i32(reg, dest); /* Unlike m68k, coldfire always clears the overflow bit. */ - gen_logic_cc(s, dest); + gen_logic_cc(s, dest, OS_LONG); } DISAS_INSN(link) @@ -1689,7 +1701,7 @@ DISAS_INSN(moveq) val = (int8_t)insn; tcg_gen_movi_i32(DREG(insn, 9), val); - gen_logic_cc(s, tcg_const_i32(val)); + gen_logic_cc(s, tcg_const_i32(val), OS_LONG); } DISAS_INSN(mvzs) @@ -1705,7 +1717,7 @@ DISAS_INSN(mvzs) SRC_EA(env, src, opsize, (insn & 0x80) == 0, NULL); reg = DREG(insn, 9); tcg_gen_mov_i32(reg, src); - gen_logic_cc(s, src); + gen_logic_cc(s, src, opsize); } DISAS_INSN(or) @@ -1726,7 +1738,7 @@ DISAS_INSN(or) tcg_gen_or_i32(dest, src, reg); tcg_gen_mov_i32(reg, dest); } - gen_logic_cc(s, dest); + gen_logic_cc(s, dest, OS_LONG); } DISAS_INSN(suba) @@ -1759,40 +1771,24 @@ DISAS_INSN(mov3q) if (val == 0) val = -1; src = tcg_const_i32(val); - gen_logic_cc(s, src); + gen_logic_cc(s, src, OS_LONG); DEST_EA(env, insn, OS_LONG, src, NULL); } DISAS_INSN(cmp) { - int op; TCGv src; TCGv reg; TCGv dest; int opsize; - op = (insn >> 6) & 3; - switch (op) { - case 0: /* cmp.b */ - opsize = OS_BYTE; - s->cc_op = CC_OP_CMPB; - break; - case 1: /* cmp.w */ - opsize = OS_WORD; - s->cc_op = CC_OP_CMPW; - break; - case 2: /* cmp.l */ - opsize = OS_LONG; - s->cc_op = CC_OP_SUB; - break; - default: - abort(); - } - SRC_EA(env, src, opsize, 1, NULL); + opsize = insn_opsize(insn); + SRC_EA(env, src, opsize, -1, NULL); reg = DREG(insn, 9); dest = tcg_temp_new(); tcg_gen_sub_i32(dest, reg, src); gen_update_cc_add(dest, src); + SET_CC_OP(opsize, SUB); } DISAS_INSN(cmpa) @@ -1812,7 +1808,7 @@ DISAS_INSN(cmpa) dest = tcg_temp_new(); tcg_gen_sub_i32(dest, reg, src); gen_update_cc_add(dest, src); - s->cc_op = CC_OP_SUB; + SET_CC_OP(OS_LONG, SUB); } DISAS_INSN(eor) @@ -1826,7 +1822,7 @@ DISAS_INSN(eor) reg = DREG(insn, 9); dest = tcg_temp_new(); tcg_gen_xor_i32(dest, src, reg); - gen_logic_cc(s, dest); + gen_logic_cc(s, dest, OS_LONG); DEST_EA(env, insn, OS_LONG, dest, &addr); } @@ -1848,7 +1844,7 @@ DISAS_INSN(and) tcg_gen_and_i32(dest, src, reg); tcg_gen_mov_i32(reg, dest); } - gen_logic_cc(s, dest); + gen_logic_cc(s, dest, OS_LONG); } DISAS_INSN(adda) @@ -1923,7 +1919,7 @@ DISAS_INSN(ff1) { TCGv reg; reg = DREG(insn, 0); - gen_logic_cc(s, reg); + gen_logic_cc(s, reg, OS_LONG); gen_helper_ff1(reg, reg); }

[PULL,10/23] target-m68k: allow to update flags with operation on words and bytes

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