| Message ID | 1477463189-26971-7-git-send-email-nikunj@linux.vnet.ibm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Oct 26, 2016 at 11:56:29AM +0530, Nikunj A Dadhania wrote: > From: Swapnil Bokade <bokadeswapnil@gmail.com> > > xvcmpnedp[.]: VSX Vector Compare Not Equal Double-Precision > xvcmpnesp[.]: VSX Vector Compare Not Equal Single-Precision > > Signed-off-by: Swapnil Bokade <bokadeswapnil@gmail.com> > Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Applied to ppc-for-2.8 > --- > target-ppc/fpu_helper.c | 19 +++++++++++-------- > target-ppc/helper.h | 2 ++ > target-ppc/translate/vsx-impl.inc.c | 2 ++ > target-ppc/translate/vsx-ops.inc.c | 2 ++ > 4 files changed, 17 insertions(+), 8 deletions(-) > > diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c > index 4906372..8a389e1 100644 > --- a/target-ppc/fpu_helper.c > +++ b/target-ppc/fpu_helper.c > @@ -2497,8 +2497,9 @@ VSX_MAX_MIN(xvminsp, minnum, 4, float32, VsrW(i)) > * fld - vsr_t field (VsrD(*) or VsrW(*)) > * cmp - comparison operation > * svxvc - set VXVC bit > + * exp - expected result of comparison > */ > -#define VSX_CMP(op, nels, tp, fld, cmp, svxvc) \ > +#define VSX_CMP(op, nels, tp, fld, cmp, svxvc, exp) \ > void helper_##op(CPUPPCState *env, uint32_t opcode) \ > { \ > ppc_vsr_t xt, xa, xb; \ > @@ -2523,7 +2524,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ > xt.fld = 0; \ > all_true = 0; \ > } else { \ > - if (tp##_##cmp(xb.fld, xa.fld, &env->fp_status) == 1) { \ > + if (tp##_##cmp(xb.fld, xa.fld, &env->fp_status) == exp) { \ > xt.fld = -1; \ > all_false = 0; \ > } else { \ > @@ -2540,12 +2541,14 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ > float_check_status(env); \ > } > > -VSX_CMP(xvcmpeqdp, 2, float64, VsrD(i), eq, 0) > -VSX_CMP(xvcmpgedp, 2, float64, VsrD(i), le, 1) > -VSX_CMP(xvcmpgtdp, 2, float64, VsrD(i), lt, 1) > -VSX_CMP(xvcmpeqsp, 4, float32, VsrW(i), eq, 0) > -VSX_CMP(xvcmpgesp, 4, float32, VsrW(i), le, 1) > -VSX_CMP(xvcmpgtsp, 4, float32, VsrW(i), lt, 1) > +VSX_CMP(xvcmpeqdp, 2, float64, VsrD(i), eq, 0, 1) > +VSX_CMP(xvcmpgedp, 2, float64, VsrD(i), le, 1, 1) > +VSX_CMP(xvcmpgtdp, 2, float64, VsrD(i), lt, 1, 1) > +VSX_CMP(xvcmpnedp, 2, float64, VsrD(i), eq, 0, 0) > +VSX_CMP(xvcmpeqsp, 4, float32, VsrW(i), eq, 0, 1) > +VSX_CMP(xvcmpgesp, 4, float32, VsrW(i), le, 1, 1) > +VSX_CMP(xvcmpgtsp, 4, float32, VsrW(i), lt, 1, 1) > +VSX_CMP(xvcmpnesp, 4, float32, VsrW(i), eq, 0, 0) > > /* VSX_CVT_FP_TO_FP - VSX floating point/floating point conversion > * op - instruction mnemonic > diff --git a/target-ppc/helper.h b/target-ppc/helper.h > index 7d42f99..201a8cf 100644 > --- a/target-ppc/helper.h > +++ b/target-ppc/helper.h > @@ -461,6 +461,7 @@ DEF_HELPER_2(xvmindp, void, env, i32) > DEF_HELPER_2(xvcmpeqdp, void, env, i32) > DEF_HELPER_2(xvcmpgedp, void, env, i32) > DEF_HELPER_2(xvcmpgtdp, void, env, i32) > +DEF_HELPER_2(xvcmpnedp, void, env, i32) > DEF_HELPER_2(xvcvdpsp, void, env, i32) > DEF_HELPER_2(xvcvdpsxds, void, env, i32) > DEF_HELPER_2(xvcvdpsxws, void, env, i32) > @@ -498,6 +499,7 @@ DEF_HELPER_2(xvminsp, void, env, i32) > DEF_HELPER_2(xvcmpeqsp, void, env, i32) > DEF_HELPER_2(xvcmpgesp, void, env, i32) > DEF_HELPER_2(xvcmpgtsp, void, env, i32) > +DEF_HELPER_2(xvcmpnesp, void, env, i32) > DEF_HELPER_2(xvcvspdp, void, env, i32) > DEF_HELPER_2(xvcvspsxds, void, env, i32) > DEF_HELPER_2(xvcvspsxws, void, env, i32) > diff --git a/target-ppc/translate/vsx-impl.inc.c b/target-ppc/translate/vsx-impl.inc.c > index bf167d0..5a27be4 100644 > --- a/target-ppc/translate/vsx-impl.inc.c > +++ b/target-ppc/translate/vsx-impl.inc.c > @@ -685,6 +685,7 @@ GEN_VSX_HELPER_2(xvmindp, 0x00, 0x1D, 0, PPC2_VSX) > GEN_VSX_HELPER_2(xvcmpeqdp, 0x0C, 0x0C, 0, PPC2_VSX) > GEN_VSX_HELPER_2(xvcmpgtdp, 0x0C, 0x0D, 0, PPC2_VSX) > GEN_VSX_HELPER_2(xvcmpgedp, 0x0C, 0x0E, 0, PPC2_VSX) > +GEN_VSX_HELPER_2(xvcmpnedp, 0x0C, 0x0F, 0, PPC2_ISA300) > GEN_VSX_HELPER_2(xvcvdpsp, 0x12, 0x18, 0, PPC2_VSX) > GEN_VSX_HELPER_2(xvcvdpsxds, 0x10, 0x1D, 0, PPC2_VSX) > GEN_VSX_HELPER_2(xvcvdpsxws, 0x10, 0x0D, 0, PPC2_VSX) > @@ -722,6 +723,7 @@ GEN_VSX_HELPER_2(xvminsp, 0x00, 0x19, 0, PPC2_VSX) > GEN_VSX_HELPER_2(xvcmpeqsp, 0x0C, 0x08, 0, PPC2_VSX) > GEN_VSX_HELPER_2(xvcmpgtsp, 0x0C, 0x09, 0, PPC2_VSX) > GEN_VSX_HELPER_2(xvcmpgesp, 0x0C, 0x0A, 0, PPC2_VSX) > +GEN_VSX_HELPER_2(xvcmpnesp, 0x0C, 0x0B, 0, PPC2_VSX) > GEN_VSX_HELPER_2(xvcvspdp, 0x12, 0x1C, 0, PPC2_VSX) > GEN_VSX_HELPER_2(xvcvspsxds, 0x10, 0x19, 0, PPC2_VSX) > GEN_VSX_HELPER_2(xvcvspsxws, 0x10, 0x09, 0, PPC2_VSX) > diff --git a/target-ppc/translate/vsx-ops.inc.c b/target-ppc/translate/vsx-ops.inc.c > index 202c557..3d91041 100644 > --- a/target-ppc/translate/vsx-ops.inc.c > +++ b/target-ppc/translate/vsx-ops.inc.c > @@ -179,6 +179,7 @@ GEN_XX3FORM(xvmindp, 0x00, 0x1D, PPC2_VSX), > GEN_XX3_RC_FORM(xvcmpeqdp, 0x0C, 0x0C, PPC2_VSX), > GEN_XX3_RC_FORM(xvcmpgtdp, 0x0C, 0x0D, PPC2_VSX), > GEN_XX3_RC_FORM(xvcmpgedp, 0x0C, 0x0E, PPC2_VSX), > +GEN_XX3_RC_FORM(xvcmpnedp, 0x0C, 0x0F, PPC2_ISA300), > GEN_XX2FORM(xvcvdpsp, 0x12, 0x18, PPC2_VSX), > GEN_XX2FORM(xvcvdpsxds, 0x10, 0x1D, PPC2_VSX), > GEN_XX2FORM(xvcvdpsxws, 0x10, 0x0D, PPC2_VSX), > @@ -216,6 +217,7 @@ GEN_XX3FORM(xvminsp, 0x00, 0x19, PPC2_VSX), > GEN_XX3_RC_FORM(xvcmpeqsp, 0x0C, 0x08, PPC2_VSX), > GEN_XX3_RC_FORM(xvcmpgtsp, 0x0C, 0x09, PPC2_VSX), > GEN_XX3_RC_FORM(xvcmpgesp, 0x0C, 0x0A, PPC2_VSX), > +GEN_XX3_RC_FORM(xvcmpnesp, 0x0C, 0x0B, PPC2_ISA300), > GEN_XX2FORM(xvcvspdp, 0x12, 0x1C, PPC2_VSX), > GEN_XX2FORM(xvcvspsxds, 0x10, 0x19, PPC2_VSX), > GEN_XX2FORM(xvcvspsxws, 0x10, 0x09, PPC2_VSX),
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c index 4906372..8a389e1 100644 --- a/target-ppc/fpu_helper.c +++ b/target-ppc/fpu_helper.c @@ -2497,8 +2497,9 @@ VSX_MAX_MIN(xvminsp, minnum, 4, float32, VsrW(i)) * fld - vsr_t field (VsrD(*) or VsrW(*)) * cmp - comparison operation * svxvc - set VXVC bit + * exp - expected result of comparison */ -#define VSX_CMP(op, nels, tp, fld, cmp, svxvc) \ +#define VSX_CMP(op, nels, tp, fld, cmp, svxvc, exp) \ void helper_##op(CPUPPCState *env, uint32_t opcode) \ { \ ppc_vsr_t xt, xa, xb; \ @@ -2523,7 +2524,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ xt.fld = 0; \ all_true = 0; \ } else { \ - if (tp##_##cmp(xb.fld, xa.fld, &env->fp_status) == 1) { \ + if (tp##_##cmp(xb.fld, xa.fld, &env->fp_status) == exp) { \ xt.fld = -1; \ all_false = 0; \ } else { \ @@ -2540,12 +2541,14 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ float_check_status(env); \ } -VSX_CMP(xvcmpeqdp, 2, float64, VsrD(i), eq, 0) -VSX_CMP(xvcmpgedp, 2, float64, VsrD(i), le, 1) -VSX_CMP(xvcmpgtdp, 2, float64, VsrD(i), lt, 1) -VSX_CMP(xvcmpeqsp, 4, float32, VsrW(i), eq, 0) -VSX_CMP(xvcmpgesp, 4, float32, VsrW(i), le, 1) -VSX_CMP(xvcmpgtsp, 4, float32, VsrW(i), lt, 1) +VSX_CMP(xvcmpeqdp, 2, float64, VsrD(i), eq, 0, 1) +VSX_CMP(xvcmpgedp, 2, float64, VsrD(i), le, 1, 1) +VSX_CMP(xvcmpgtdp, 2, float64, VsrD(i), lt, 1, 1) +VSX_CMP(xvcmpnedp, 2, float64, VsrD(i), eq, 0, 0) +VSX_CMP(xvcmpeqsp, 4, float32, VsrW(i), eq, 0, 1) +VSX_CMP(xvcmpgesp, 4, float32, VsrW(i), le, 1, 1) +VSX_CMP(xvcmpgtsp, 4, float32, VsrW(i), lt, 1, 1) +VSX_CMP(xvcmpnesp, 4, float32, VsrW(i), eq, 0, 0) /* VSX_CVT_FP_TO_FP - VSX floating point/floating point conversion * op - instruction mnemonic diff --git a/target-ppc/helper.h b/target-ppc/helper.h index 7d42f99..201a8cf 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -461,6 +461,7 @@ DEF_HELPER_2(xvmindp, void, env, i32) DEF_HELPER_2(xvcmpeqdp, void, env, i32) DEF_HELPER_2(xvcmpgedp, void, env, i32) DEF_HELPER_2(xvcmpgtdp, void, env, i32) +DEF_HELPER_2(xvcmpnedp, void, env, i32) DEF_HELPER_2(xvcvdpsp, void, env, i32) DEF_HELPER_2(xvcvdpsxds, void, env, i32) DEF_HELPER_2(xvcvdpsxws, void, env, i32) @@ -498,6 +499,7 @@ DEF_HELPER_2(xvminsp, void, env, i32) DEF_HELPER_2(xvcmpeqsp, void, env, i32) DEF_HELPER_2(xvcmpgesp, void, env, i32) DEF_HELPER_2(xvcmpgtsp, void, env, i32) +DEF_HELPER_2(xvcmpnesp, void, env, i32) DEF_HELPER_2(xvcvspdp, void, env, i32) DEF_HELPER_2(xvcvspsxds, void, env, i32) DEF_HELPER_2(xvcvspsxws, void, env, i32) diff --git a/target-ppc/translate/vsx-impl.inc.c b/target-ppc/translate/vsx-impl.inc.c index bf167d0..5a27be4 100644 --- a/target-ppc/translate/vsx-impl.inc.c +++ b/target-ppc/translate/vsx-impl.inc.c @@ -685,6 +685,7 @@ GEN_VSX_HELPER_2(xvmindp, 0x00, 0x1D, 0, PPC2_VSX) GEN_VSX_HELPER_2(xvcmpeqdp, 0x0C, 0x0C, 0, PPC2_VSX) GEN_VSX_HELPER_2(xvcmpgtdp, 0x0C, 0x0D, 0, PPC2_VSX) GEN_VSX_HELPER_2(xvcmpgedp, 0x0C, 0x0E, 0, PPC2_VSX) +GEN_VSX_HELPER_2(xvcmpnedp, 0x0C, 0x0F, 0, PPC2_ISA300) GEN_VSX_HELPER_2(xvcvdpsp, 0x12, 0x18, 0, PPC2_VSX) GEN_VSX_HELPER_2(xvcvdpsxds, 0x10, 0x1D, 0, PPC2_VSX) GEN_VSX_HELPER_2(xvcvdpsxws, 0x10, 0x0D, 0, PPC2_VSX) @@ -722,6 +723,7 @@ GEN_VSX_HELPER_2(xvminsp, 0x00, 0x19, 0, PPC2_VSX) GEN_VSX_HELPER_2(xvcmpeqsp, 0x0C, 0x08, 0, PPC2_VSX) GEN_VSX_HELPER_2(xvcmpgtsp, 0x0C, 0x09, 0, PPC2_VSX) GEN_VSX_HELPER_2(xvcmpgesp, 0x0C, 0x0A, 0, PPC2_VSX) +GEN_VSX_HELPER_2(xvcmpnesp, 0x0C, 0x0B, 0, PPC2_VSX) GEN_VSX_HELPER_2(xvcvspdp, 0x12, 0x1C, 0, PPC2_VSX) GEN_VSX_HELPER_2(xvcvspsxds, 0x10, 0x19, 0, PPC2_VSX) GEN_VSX_HELPER_2(xvcvspsxws, 0x10, 0x09, 0, PPC2_VSX) diff --git a/target-ppc/translate/vsx-ops.inc.c b/target-ppc/translate/vsx-ops.inc.c index 202c557..3d91041 100644 --- a/target-ppc/translate/vsx-ops.inc.c +++ b/target-ppc/translate/vsx-ops.inc.c @@ -179,6 +179,7 @@ GEN_XX3FORM(xvmindp, 0x00, 0x1D, PPC2_VSX), GEN_XX3_RC_FORM(xvcmpeqdp, 0x0C, 0x0C, PPC2_VSX), GEN_XX3_RC_FORM(xvcmpgtdp, 0x0C, 0x0D, PPC2_VSX), GEN_XX3_RC_FORM(xvcmpgedp, 0x0C, 0x0E, PPC2_VSX), +GEN_XX3_RC_FORM(xvcmpnedp, 0x0C, 0x0F, PPC2_ISA300), GEN_XX2FORM(xvcvdpsp, 0x12, 0x18, PPC2_VSX), GEN_XX2FORM(xvcvdpsxds, 0x10, 0x1D, PPC2_VSX), GEN_XX2FORM(xvcvdpsxws, 0x10, 0x0D, PPC2_VSX), @@ -216,6 +217,7 @@ GEN_XX3FORM(xvminsp, 0x00, 0x19, PPC2_VSX), GEN_XX3_RC_FORM(xvcmpeqsp, 0x0C, 0x08, PPC2_VSX), GEN_XX3_RC_FORM(xvcmpgtsp, 0x0C, 0x09, PPC2_VSX), GEN_XX3_RC_FORM(xvcmpgesp, 0x0C, 0x0A, PPC2_VSX), +GEN_XX3_RC_FORM(xvcmpnesp, 0x0C, 0x0B, PPC2_ISA300), GEN_XX2FORM(xvcvspdp, 0x12, 0x1C, PPC2_VSX), GEN_XX2FORM(xvcvspsxds, 0x10, 0x19, PPC2_VSX), GEN_XX2FORM(xvcvspsxws, 0x10, 0x09, PPC2_VSX),