From patchwork Tue Nov 15 15:29:58 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kirti Wankhede X-Patchwork-Id: 9430121 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1240A60484 for ; Tue, 15 Nov 2016 15:52:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 008AC2860F for ; Tue, 15 Nov 2016 15:52:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E5CB628956; Tue, 15 Nov 2016 15:52:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 74B002860F for ; Tue, 15 Nov 2016 15:52:11 +0000 (UTC) Received: from localhost ([::1]:47168 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c6g1q-0001GW-Id for patchwork-qemu-devel@patchwork.kernel.org; Tue, 15 Nov 2016 10:52:10 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46298) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c6fgH-0000JS-4m for qemu-devel@nongnu.org; Tue, 15 Nov 2016 10:29:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1c6fgF-0004I6-Ji for qemu-devel@nongnu.org; Tue, 15 Nov 2016 10:29:53 -0500 Received: from hqemgate16.nvidia.com ([216.228.121.65]:11217) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1c6fgF-0004Hc-Bb for qemu-devel@nongnu.org; Tue, 15 Nov 2016 10:29:51 -0500 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Tue, 15 Nov 2016 07:53:12 -0800 Received: from HQMAIL104.nvidia.com ([172.20.13.39]) by hqnvupgp07.nvidia.com (PGP Universal service); Mon, 14 Nov 2016 19:28:52 -0800 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Mon, 14 Nov 2016 19:28:52 -0800 Received: from HQMAIL104.nvidia.com (172.18.146.11) by HQMAIL104.nvidia.com (172.18.146.11) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Tue, 15 Nov 2016 15:29:49 +0000 Received: from kwankhede-dev.nvidia.com (172.20.13.39) by HQMAIL104.nvidia.com (172.18.146.11) with Microsoft SMTP Server (TLS) id 15.0.1210.3 via Frontend Transport; Tue, 15 Nov 2016 15:29:46 +0000 From: Kirti Wankhede To: , , , Date: Tue, 15 Nov 2016 20:59:58 +0530 Message-ID: <1479223805-22895-16-git-send-email-kwankhede@nvidia.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1479223805-22895-1-git-send-email-kwankhede@nvidia.com> References: <1479223805-22895-1-git-send-email-kwankhede@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 X-Received-From: 216.228.121.65 Subject: [Qemu-devel] [PATCH v13 15/22] vfio: Introduce vfio_set_irqs_validate_and_prepare() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jike.song@intel.com, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, kevin.tian@intel.com, qemu-devel@nongnu.org, Kirti Wankhede , bjsdjshi@linux.vnet.ibm.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Vendor driver using mediated device framework would use same mechnism to validate and prepare IRQs. Introducing this function to reduce code replication in multiple drivers. Signed-off-by: Kirti Wankhede Signed-off-by: Neo Jia Change-Id: Ie201f269dda0713ca18a07dc4852500bd8b48309 --- drivers/vfio/vfio.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++ include/linux/vfio.h | 4 ++++ 2 files changed, 52 insertions(+) diff --git a/drivers/vfio/vfio.c b/drivers/vfio/vfio.c index ea88360f4aea..089f3cdd0aa9 100644 --- a/drivers/vfio/vfio.c +++ b/drivers/vfio/vfio.c @@ -1858,6 +1858,54 @@ int vfio_info_add_capability(struct vfio_info_cap *caps, int cap_type_id, } EXPORT_SYMBOL(vfio_info_add_capability); +int vfio_set_irqs_validate_and_prepare(struct vfio_irq_set *hdr, int num_irqs, + int max_irq_type, size_t *data_size) +{ + unsigned long minsz; + size_t size; + + minsz = offsetofend(struct vfio_irq_set, count); + + if ((hdr->argsz < minsz) || (hdr->index >= max_irq_type) || + (hdr->count >= (U32_MAX - hdr->start)) || + (hdr->flags & ~(VFIO_IRQ_SET_DATA_TYPE_MASK | + VFIO_IRQ_SET_ACTION_TYPE_MASK))) + return -EINVAL; + + if (data_size) + *data_size = 0; + + if (hdr->start >= num_irqs || hdr->start + hdr->count > num_irqs) + return -EINVAL; + + switch (hdr->flags & VFIO_IRQ_SET_DATA_TYPE_MASK) { + case VFIO_IRQ_SET_DATA_NONE: + size = 0; + break; + case VFIO_IRQ_SET_DATA_BOOL: + size = sizeof(uint8_t); + break; + case VFIO_IRQ_SET_DATA_EVENTFD: + size = sizeof(int32_t); + break; + default: + return -EINVAL; + } + + if (size) { + if (hdr->argsz - minsz < hdr->count * size) + return -EINVAL; + + if (!data_size) + return -EINVAL; + + *data_size = hdr->count * size; + } + + return 0; +} +EXPORT_SYMBOL(vfio_set_irqs_validate_and_prepare); + /* * Pin a set of guest PFNs and return their associated host PFNs for local * domain only. diff --git a/include/linux/vfio.h b/include/linux/vfio.h index 236f0e55af11..0bf07d60fbb3 100644 --- a/include/linux/vfio.h +++ b/include/linux/vfio.h @@ -114,6 +114,10 @@ extern void vfio_info_cap_shift(struct vfio_info_cap *caps, size_t offset); extern int vfio_info_add_capability(struct vfio_info_cap *caps, int cap_type_id, void *cap_type); +extern int vfio_set_irqs_validate_and_prepare(struct vfio_irq_set *hdr, + int num_irqs, int max_irq_type, + size_t *data_size); + struct pci_dev; #ifdef CONFIG_EEH extern void vfio_spapr_pci_eeh_open(struct pci_dev *pdev);