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Dadhania" X-Patchwork-Id: 9460871 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5C16760236 for ; Mon, 5 Dec 2016 11:31:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4CAD426242 for ; Mon, 5 Dec 2016 11:31:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4155B2705B; Mon, 5 Dec 2016 11:31:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id ABEEE26242 for ; Mon, 5 Dec 2016 11:31:34 +0000 (UTC) Received: from localhost ([::1]:39247 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cDrUb-0007Ix-3L for patchwork-qemu-devel@patchwork.kernel.org; Mon, 05 Dec 2016 06:31:33 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54414) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cDrP8-000310-25 for qemu-devel@nongnu.org; Mon, 05 Dec 2016 06:25:55 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cDrP4-0007dY-24 for qemu-devel@nongnu.org; Mon, 05 Dec 2016 06:25:54 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:35813 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cDrP3-0007dL-S4 for qemu-devel@nongnu.org; Mon, 05 Dec 2016 06:25:49 -0500 Received: from pps.filterd (m0098420.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.17/8.16.0.17) with SMTP id uB5BKURx018498 for ; Mon, 5 Dec 2016 06:25:49 -0500 Received: from e23smtp01.au.ibm.com (e23smtp01.au.ibm.com [202.81.31.143]) by mx0b-001b2d01.pphosted.com with ESMTP id 2753jwb26e-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Mon, 05 Dec 2016 06:25:49 -0500 Received: from localhost by e23smtp01.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Mon, 5 Dec 2016 21:25:44 +1000 Received: from d23relay08.au.ibm.com (d23relay08.au.ibm.com [9.185.71.33]) by d23dlp03.au.ibm.com (Postfix) with ESMTP id 6CACD3578052; Mon, 5 Dec 2016 22:25:44 +1100 (EST) Received: from d23av04.au.ibm.com (d23av04.au.ibm.com [9.190.235.139]) by d23relay08.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id uB5BPiVs46792722; Mon, 5 Dec 2016 22:25:44 +1100 Received: from d23av04.au.ibm.com (localhost [127.0.0.1]) by d23av04.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id uB5BPhO2005491; Mon, 5 Dec 2016 22:25:44 +1100 Received: from abhimanyu.in.ibm.com (abhimanyu.in.ibm.com [9.124.35.213] (may be forged)) by d23av04.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id uB5BPbHl005358; Mon, 5 Dec 2016 22:25:42 +1100 From: Nikunj A Dadhania To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net Date: Mon, 5 Dec 2016 16:55:20 +0530 X-Mailer: git-send-email 2.7.4 In-Reply-To: <1480937130-24561-1-git-send-email-nikunj@linux.vnet.ibm.com> References: <1480937130-24561-1-git-send-email-nikunj@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16120511-1617-0000-0000-00000189CE80 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 16120511-1618-0000-0000-0000474BE886 Message-Id: <1480937130-24561-4-git-send-email-nikunj@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2016-12-05_08:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=2 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1609300000 definitions=main-1612050196 X-MIME-Autoconverted: from 8bit to quoted-printable by mx0b-001b2d01.pphosted.com id uB5BKURx018498 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 03/13] target-ppc: implement lxvl instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, nikunj@linux.vnet.ibm.com, bharata@linux.vnet.ibm.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP lxvl: Load VSX Vector with Length Little/Big-endian Storage: +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ |“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|FF|FF| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ Loading 14 bytes results in: Vector (8-bit elements) in BE: +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ |“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|00|00| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ Vector (8-bit elements) in LE: +--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ |00|00|“T”|“S”|“E”|“T”|“ ”|“a”|“ ”|“s”|“i”|“ ”|“s”|“i”|"h"|"T"| +--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ Signed-off-by: Nikunj A Dadhania --- target-ppc/helper.h | 1 + target-ppc/mem_helper.c | 25 +++++++++++++++++++++++++ target-ppc/translate/vsx-impl.inc.c | 27 +++++++++++++++++++++++++++ target-ppc/translate/vsx-ops.inc.c | 1 + 4 files changed, 54 insertions(+) diff --git a/target-ppc/helper.h b/target-ppc/helper.h index bc39efb..d9ccafd 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -317,6 +317,7 @@ DEF_HELPER_3(lvewx, void, env, avr, tl) DEF_HELPER_3(stvebx, void, env, avr, tl) DEF_HELPER_3(stvehx, void, env, avr, tl) DEF_HELPER_3(stvewx, void, env, avr, tl) +DEF_HELPER_4(lxvl, void, env, tl, tl, tl) DEF_HELPER_4(vsumsws, void, env, avr, avr, avr) DEF_HELPER_4(vsum2sws, void, env, avr, avr, avr) DEF_HELPER_4(vsum4sbs, void, env, avr, avr, avr) diff --git a/target-ppc/mem_helper.c b/target-ppc/mem_helper.c index 1ab8a6e..0a8ff54 100644 --- a/target-ppc/mem_helper.c +++ b/target-ppc/mem_helper.c @@ -24,6 +24,7 @@ #include "helper_regs.h" #include "exec/cpu_ldst.h" +#include "internal.h" //#define DEBUG_OP @@ -284,6 +285,30 @@ STVE(stvewx, cpu_stl_data_ra, bswap32, u32) #undef I #undef LVE +void helper_lxvl(CPUPPCState *env, target_ulong addr, + target_ulong xt_num, target_ulong rb) +{ + ppc_vsr_t xt; + + getVSR(xt_num, &xt, env); + if (unlikely((rb & 0xFF) == 0)) { + xt.s128 = int128_make128(0, 0); + } else { + target_ulong end = ((rb & 0xFF) * 8) - 1; + if (msr_le) { + xt.u64[HI_IDX] = bswap64(cpu_ldq_data_ra(env, addr, GETPC())); + addr = addr_add(env, addr, 8); + xt.u64[LO_IDX] = bswap64(cpu_ldq_data_ra(env, addr, GETPC())); + } else { + xt.u64[HI_IDX] = cpu_ldq_data_ra(env, addr, GETPC()); + addr = addr_add(env, addr, 8); + xt.u64[LO_IDX] = cpu_ldq_data_ra(env, addr, GETPC()); + } + xt.s128 = int128_and(xt.s128, mask_u128(0, end)); + } + putVSR(xt_num, &xt, env); +} + #undef HI_IDX #undef LO_IDX diff --git a/target-ppc/translate/vsx-impl.inc.c b/target-ppc/translate/vsx-impl.inc.c index 2fbdbd2..e53f91e 100644 --- a/target-ppc/translate/vsx-impl.inc.c +++ b/target-ppc/translate/vsx-impl.inc.c @@ -240,6 +240,33 @@ VSX_VECTOR_LOAD_STORE(stxv, st_i64, 0) VSX_VECTOR_LOAD_STORE(lxvx, ld_i64, 1) VSX_VECTOR_LOAD_STORE(stxvx, st_i64, 1) +#define VSX_VECTOR_LOAD_STORE_LENGTH(name) \ +static void gen_##name(DisasContext *ctx) \ +{ \ + TCGv EA, xt; \ + \ + if (xT(ctx->opcode) < 32) { \ + if (unlikely(!ctx->vsx_enabled)) { \ + gen_exception(ctx, POWERPC_EXCP_VSXU); \ + return; \ + } \ + } else { \ + if (unlikely(!ctx->altivec_enabled)) { \ + gen_exception(ctx, POWERPC_EXCP_VPU); \ + return; \ + } \ + } \ + EA = tcg_temp_new(); \ + xt = tcg_const_tl(xT(ctx->opcode)); \ + gen_set_access_type(ctx, ACCESS_INT); \ + gen_addr_register(ctx, EA); \ + gen_helper_##name(cpu_env, EA, xt, cpu_gpr[rB(ctx->opcode)]); \ + tcg_temp_free(EA); \ + tcg_temp_free(xt); \ +} + +VSX_VECTOR_LOAD_STORE_LENGTH(lxvl) + #define VSX_LOAD_SCALAR_DS(name, operation) \ static void gen_##name(DisasContext *ctx) \ { \ diff --git a/target-ppc/translate/vsx-ops.inc.c b/target-ppc/translate/vsx-ops.inc.c index 8a1cbe0..3383cdd 100644 --- a/target-ppc/translate/vsx-ops.inc.c +++ b/target-ppc/translate/vsx-ops.inc.c @@ -10,6 +10,7 @@ GEN_HANDLER_E(lxvw4x, 0x1F, 0x0C, 0x18, 0, PPC_NONE, PPC2_VSX), GEN_HANDLER_E(lxvh8x, 0x1F, 0x0C, 0x19, 0, PPC_NONE, PPC2_ISA300), GEN_HANDLER_E(lxvb16x, 0x1F, 0x0C, 0x1B, 0, PPC_NONE, PPC2_ISA300), GEN_HANDLER_E(lxvx, 0x1F, 0x0C, 0x08, 0x00000040, PPC_NONE, PPC2_ISA300), +GEN_HANDLER_E(lxvl, 0x1F, 0x0D, 0x08, 0, PPC_NONE, PPC2_ISA300), GEN_HANDLER_E(stxsdx, 0x1F, 0xC, 0x16, 0, PPC_NONE, PPC2_VSX), GEN_HANDLER_E(stxsibx, 0x1F, 0xD, 0x1C, 0, PPC_NONE, PPC2_ISA300),