From patchwork Fri Jan 13 06:28:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suraj Jitindar Singh X-Patchwork-Id: 9514673 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7952060762 for ; Fri, 13 Jan 2017 06:42:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 72CC9285AE for ; Fri, 13 Jan 2017 06:42:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 67DD8285D0; Fri, 13 Jan 2017 06:42:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0AFEB285AE for ; Fri, 13 Jan 2017 06:42:01 +0000 (UTC) Received: from localhost ([::1]:39347 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cRvYm-0001lj-4Z for patchwork-qemu-devel@patchwork.kernel.org; Fri, 13 Jan 2017 01:42:00 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53163) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cRvMD-0006BW-3O for qemu-devel@nongnu.org; Fri, 13 Jan 2017 01:29:02 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cRvMC-0001z6-3E for qemu-devel@nongnu.org; Fri, 13 Jan 2017 01:29:01 -0500 Received: from mail-pf0-x241.google.com ([2607:f8b0:400e:c00::241]:35535) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cRvM8-0001y6-QD; Fri, 13 Jan 2017 01:28:56 -0500 Received: by mail-pf0-x241.google.com with SMTP id f144so6904676pfa.2; Thu, 12 Jan 2017 22:28:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=o7GbHUBBxTWYWJpb67dZrcIy5tQ4R2pouFGnTKhWqSw=; b=izK9vSg8r6iveWPnLiRBVJxHGD48NkAge+lNr/KapFVb9M82qIiiuVWHdsJUf2okJt qEfb1HsmmC+uJly7ytr/hxt2ms7XJjlOHfFPM9Nfumfb4EiULVbwM2cgsDkHTrYFGIE4 srgbrCwx+kTCclGrQMA06AuMcqX5FhdbI02tpzp+NJnoAPLD2OPO2rAtJNPIYT7hW7sz bN+BYeLcgqx0KfmaXpv9O3l8E+x5k9tlBZ1epp7MXayRPbfIOSYzUS9fd/c3nuXdjlyg EPgv7PXSd1Mz1WAMMgSa/8wmCdWxEaCxVseMGyMCbdm0aqIDtkphDv6A7eNQWBxjypGk 4xkQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=o7GbHUBBxTWYWJpb67dZrcIy5tQ4R2pouFGnTKhWqSw=; b=gFMdxrNg4ZFpr8ECptfqQw2EcYsI4V7NQYQX0cM8l4HPDoNgxy+eXv2Wxp7gWS4kSb dMtRUwHyXllynhZCsLiuV8lEn2TKpti+zmRGANco4DCZP4hLWvfMCB1ftgi7uhboCzZh pseGleieX/Fs5yRRpGSQ57Nba6rkfd53haBMy4WQLxcXmpydUTvYqZ8QjNNjwNbKTKF2 s1sDtvzRPKcxcx+6FIvqnOSPCtj2JbA6SCikC07L9zr1ZrtwzVJcc10IXjfffLgnkosl dIxWDbkaTajrwk7IRDd8Jgy5orjuGeQkYtLUBUxtqzu/EyBuLqWZYyRScA8WUx9znYQK 3+yA== X-Gm-Message-State: AIkVDXIweSqayQfIzhNNMlXJ64rA3j7cmLsc6qbiMk4eRvOKjjOM6vuuKXTAKHKWO2383A== X-Received: by 10.84.178.195 with SMTP id z61mr27764991plb.176.1484288936029; Thu, 12 Jan 2017 22:28:56 -0800 (PST) Received: from dyn253.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id r2sm26004999pfi.67.2017.01.12.22.28.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 12 Jan 2017 22:28:55 -0800 (PST) From: Suraj Jitindar Singh To: qemu-ppc@nongnu.org Date: Fri, 13 Jan 2017 17:28:14 +1100 Message-Id: <1484288903-18807-9-git-send-email-sjitindarsingh@gmail.com> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1484288903-18807-1-git-send-email-sjitindarsingh@gmail.com> References: <1484288903-18807-1-git-send-email-sjitindarsingh@gmail.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:400e:c00::241 Subject: [Qemu-devel] [RFC PATCH 08/17] target/ppc/POWER9: Add external partition table pointer to cpu state X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, agraf@suse.de, Suraj Jitindar Singh , david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Similarly to how we have an external hpt pointer in the cpu state, add an external partition table pointer and update it to point to the partition table entry in the machine state struct on cpu reset. Signed-off-by: Suraj Jitindar Singh --- hw/ppc/spapr_cpu_core.c | 12 ++++++++++-- target/ppc/cpu.h | 3 +++ target/ppc/mmu.h | 6 ++++++ target/ppc/mmu_helper.c | 12 ++++++++++++ 4 files changed, 31 insertions(+), 2 deletions(-) diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 8cc7058..72a7f90 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -17,6 +17,7 @@ #include "hw/ppc/ppc.h" #include "target/ppc/mmu-hash64.h" #include "sysemu/numa.h" +#include "mmu.h" static void spapr_cpu_reset(void *opaque) { @@ -34,8 +35,15 @@ static void spapr_cpu_reset(void *opaque) env->spr[SPR_HIOR] = 0; - ppc_hash64_set_external_hpt(cpu, spapr->htab, spapr->htab_shift, - &error_fatal); + switch (env->mmu_model) { + case POWERPC_MMU_3_00: + ppc64_set_external_patb(cpu, spapr->patb, &error_fatal); + default: + /* We assume legacy until told otherwise, thus set HPT irrespective */ + ppc_hash64_set_external_hpt(cpu, spapr->htab, spapr->htab_shift, + &error_fatal); + break; + } } static void spapr_cpu_destroy(PowerPCCPU *cpu) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 0ab49b3..e8b7c06 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -77,6 +77,7 @@ #include "exec/cpu-defs.h" #include "cpu-qom.h" #include "fpu/softfloat.h" +#include "mmu.h" #if defined (TARGET_PPC64) #define PPC_ELF_MACHINE EM_PPC64 @@ -1009,6 +1010,8 @@ struct CPUPPCState { target_ulong sr[32]; /* externally stored hash table */ uint8_t *external_htab; + /* externally stored partition table entry */ + struct patb_entry *external_patbe; /* BATs */ uint32_t nb_BATs; target_ulong DBAT[2][8]; diff --git a/target/ppc/mmu.h b/target/ppc/mmu.h index 67b9707..c7967c3 100644 --- a/target/ppc/mmu.h +++ b/target/ppc/mmu.h @@ -8,6 +8,12 @@ struct patb_entry { uint64_t patbe0, patbe1; }; +#ifdef TARGET_PPC64 + +void ppc64_set_external_patb(PowerPCCPU *cpu, void *patb, Error **errp); + +#endif /* TARGET_PPC64 */ + #endif /* CONFIG_USER_ONLY */ #endif /* MMU_H */ diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 2ab4562..bc6c117 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -28,6 +28,7 @@ #include "exec/cpu_ldst.h" #include "exec/log.h" #include "helper_regs.h" +#include "mmu.h" //#define DEBUG_MMU //#define DEBUG_BATS @@ -2907,3 +2908,14 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, retaddr); } } + +/******************************************************************************/ + +/* ISA v3.00 (POWER9) Generic MMU Helpers */ + +void ppc64_set_external_patb(PowerPCCPU *cpu, void *patb, Error **errp) +{ + CPUPPCState *env = &cpu->env; + + env->external_patbe = (struct patb_entry *) patb; +}