From patchwork Mon Feb 20 04:04:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suraj Jitindar Singh X-Patchwork-Id: 9581973 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 464E46047C for ; Mon, 20 Feb 2017 04:10:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 381BB28851 for ; Mon, 20 Feb 2017 04:10:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2CE7528857; Mon, 20 Feb 2017 04:10:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8022528851 for ; Mon, 20 Feb 2017 04:10:39 +0000 (UTC) Received: from localhost ([::1]:35992 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cffJ8-0004pf-HG for patchwork-qemu-devel@patchwork.kernel.org; Sun, 19 Feb 2017 23:10:38 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39930) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cffDu-0000NJ-D8 for qemu-devel@nongnu.org; Sun, 19 Feb 2017 23:05:15 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cffDs-0002mZ-VY for qemu-devel@nongnu.org; Sun, 19 Feb 2017 23:05:14 -0500 Received: from mail-pg0-x244.google.com ([2607:f8b0:400e:c05::244]:34530) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cffDp-0002gF-SK; Sun, 19 Feb 2017 23:05:10 -0500 Received: by mail-pg0-x244.google.com with SMTP id s67so610827pgb.1; Sun, 19 Feb 2017 20:05:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=MzNc9EVwAZHUbKZ860GckX4mJJiHwuqXL+o2kYHC/zw=; b=FSZCZbvYicKStl6k1nkAaLkyRWF48ktLKryLkb07BdgSVdbPCyq4KBERBxPXYPehGC WWIZOsjUmqH3z2Ti41C1aSfD/Ply2bHr6Pe2suK8kF5t6mHCnwdJrjI6QiL+eU/2SY9o SEm7PHAMHzXXGNQBGjmARuewhntSGHnbCCexhVB/48sL95lMxeT0Z3DSIpC+VEMd5hdI to/fphHo6dSvOQIO2q2a329vX9l6C0bE6ypu0hqxF+iaSbsozWJ3e2f2cgfUksU8xIpR MF5bVhX9dq+rd1YlIQWKJsUQf7SLgYjvbwnhRx6P+QYRexY2d/G6zkbDW4gIbbdmC+zs FAgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=MzNc9EVwAZHUbKZ860GckX4mJJiHwuqXL+o2kYHC/zw=; b=Tg1IeNkyHhKJ9b6rZsvT4ttxJ5gmYiMMUVh/K8HTZF67hbWop8OqWZk++zHLddPsB8 90gZfEOQTklqyZK01vtyEF+2DgCADfBxDh9xtvGjwN/OmOczRFcb3nXDh0zqEfYzI8nV Ftj7FWy77JBjXvXhSllSRCpvqr3Dw1XNlFGu9+x8HJv2OnXf+AVsj4UHuU6OxOaNzauA 8x0RpJDwOtLbUQJfy+CBTO0xQVyyTYxuHu4/yKd7Y3vJ9c9iK/4IQuRpxOOC2fFvktX9 WQs1USjSQW9/svkId7CvL1ziCjUAYwA5dyHgAWxgOqwjv9pQKckkOVOVbxmtfyY5ag5X xyzQ== X-Gm-Message-State: AMke39lLBSXIDENIGAAMhyFmNBvuwB/vdgW2objl78aSt5kwD2yyERFBsK6cAhfj7F+VXg== X-Received: by 10.84.233.194 with SMTP id m2mr28915286pln.126.1487563508883; Sun, 19 Feb 2017 20:05:08 -0800 (PST) Received: from surajjs.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id d78sm31622707pfb.43.2017.02.19.20.05.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 19 Feb 2017 20:05:08 -0800 (PST) From: Suraj Jitindar Singh To: qemu-ppc@nongnu.org Date: Mon, 20 Feb 2017 15:04:35 +1100 Message-Id: <1487563478-22265-8-git-send-email-sjitindarsingh@gmail.com> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1487563478-22265-1-git-send-email-sjitindarsingh@gmail.com> References: <1487563478-22265-1-git-send-email-sjitindarsingh@gmail.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:400e:c05::244 Subject: [Qemu-devel] [QEMU-PPC] [PATCH V3 07/10] target/ppc/POWER9: Add POWER9 mmu fault handler X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, sjitindarsingh@gmail.com, agraf@suse.de, sam.bobroff@au1.ibm.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add a new mmu fault handler for the POWER9 cpu and add it as the handler for the POWER9 cpu definition. This handler checks if the guest is radix or hash based on the value in the partition table entry and calls the correct fault handler accordingly. The hash fault handling code has also been updated to check if the partition is using segment tables. Currently only legacy hash (no segment tables) is supported. Signed-off-by: Suraj Jitindar Singh --- V2->V3: - error_report on attempt to use segment tables instead of just LOG() - Rename mmu.h -> mmu-book3s-v3.h --- target/ppc/mmu-book3s-v3.h | 50 +++++++++++++++++++++++++++++++++++++++++++++ target/ppc/mmu-hash64.c | 8 ++++++++ target/ppc/mmu_helper.c | 40 ++++++++++++++++++++++++++++++++++++ target/ppc/translate_init.c | 3 ++- 4 files changed, 100 insertions(+), 1 deletion(-) create mode 100644 target/ppc/mmu-book3s-v3.h diff --git a/target/ppc/mmu-book3s-v3.h b/target/ppc/mmu-book3s-v3.h new file mode 100644 index 0000000..9375921 --- /dev/null +++ b/target/ppc/mmu-book3s-v3.h @@ -0,0 +1,50 @@ +/* + * PowerPC emulation generic mmu definitions for qemu. + * + * Copyright (c) 2017 Suraj Jitindar Singh, IBM Corporation + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#ifndef MMU_H +#define MMU_H + +#ifndef CONFIG_USER_ONLY + +/* Partition Table Entry Fields */ +#define PATBE1_GR 0x8000000000000000 + +#ifdef TARGET_PPC64 + +static inline bool ppc64_use_proc_tbl(PowerPCCPU *cpu) +{ + return !!(cpu->env.spr[SPR_LPCR] & LPCR_UPRT); +} + +static inline bool ppc64_radix_guest(PowerPCCPU *cpu) +{ + PPCVirtualHypervisorClass *vhc = + PPC_VIRTUAL_HYPERVISOR_GET_CLASS(cpu->vhyp); + + return !!(vhc->get_patbe(cpu->vhyp) & PATBE1_GR); +} + +int ppc64_v3_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, + int mmu_idx); + +#endif /* TARGET_PPC64 */ + +#endif /* CONFIG_USER_ONLY */ + +#endif /* MMU_H */ diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index 3e17a9f..a581b50 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -27,6 +27,7 @@ #include "kvm_ppc.h" #include "mmu-hash64.h" #include "exec/log.h" +#include "mmu-book3s-v3.h" //#define DEBUG_SLB @@ -767,6 +768,13 @@ int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, /* 2. Translation is on, so look up the SLB */ slb = slb_lookup(cpu, eaddr); if (!slb) { + /* No entry found, check if in-memory segment tables are in use */ + if (ppc64_use_proc_tbl(cpu)) { + /* TODO - Unsupported */ + error_report("Segment Table Support Unimplemented"); + abort(); + } + /* Segment still not found, generate the appropriate interrupt */ if (rwx == 2) { cs->exception_index = POWERPC_EXCP_ISEG; env->error_code = 0; diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 2911266..527123c 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -28,6 +28,8 @@ #include "exec/cpu_ldst.h" #include "exec/log.h" #include "helper_regs.h" +#include "qemu/error-report.h" +#include "mmu-book3s-v3.h" //#define DEBUG_MMU //#define DEBUG_BATS @@ -1280,6 +1282,17 @@ void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env) case POWERPC_MMU_2_07a: dump_slb(f, cpu_fprintf, ppc_env_get_cpu(env)); break; + case POWERPC_MMU_3_00: + if (ppc64_radix_guest(ppc_env_get_cpu(env))) { + /* TODO - Unsupported */ + } else { + if (ppc64_use_proc_tbl(ppc_env_get_cpu(env))) { + /* TODO - Unsupported */ + } else { + dump_slb(f, cpu_fprintf, ppc_env_get_cpu(env)); + break; + } + } #endif default: qemu_log_mask(LOG_UNIMP, "%s: unimplemented\n", __func__); @@ -1421,6 +1434,17 @@ hwaddr ppc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) case POWERPC_MMU_2_07: case POWERPC_MMU_2_07a: return ppc_hash64_get_phys_page_debug(cpu, addr); + case POWERPC_MMU_3_00: + if (ppc64_radix_guest(ppc_env_get_cpu(env))) { + /* TODO - Unsupported */ + } else { + if (ppc64_use_proc_tbl(ppc_env_get_cpu(env))) { + /* TODO - Unsupported */ + } else { + return ppc_hash64_get_phys_page_debug(cpu, addr); + } + } + break; #endif case POWERPC_MMU_32B: @@ -2907,3 +2931,19 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, retaddr); } } + +/******************************************************************************/ + +/* ISA v3.00 (POWER9) Generic MMU Helpers */ + +int ppc64_v3_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, + int mmu_idx) +{ + if (ppc64_radix_guest(cpu)) { /* Guest uses radix */ + /* TODO - Unsupported */ + error_report("Guest Radix Support Unimplemented"); + abort(); + } else { /* Guest uses hash */ + return ppc_hash64_handle_mmu_fault(cpu, eaddr, rwx, mmu_idx); + } +} diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index 32c1619..7661c21 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -32,6 +32,7 @@ #include "qapi/visitor.h" #include "hw/qdev-properties.h" #include "hw/ppc/ppc.h" +#include "mmu-book3s-v3.h" //#define PPC_DUMP_CPU //#define PPC_DEBUG_SPR @@ -8898,7 +8899,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data) (1ull << MSR_LE); pcc->mmu_model = POWERPC_MMU_3_00; #if defined(CONFIG_SOFTMMU) - pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault; + pcc->handle_mmu_fault = ppc64_v3_handle_mmu_fault; /* segment page size remain the same */ pcc->sps = &POWER7_POWER8_sps; #endif