[v4,09/15] target/ppc: update ca32 in arithmetic substract

Commit Message

Nikunj A. Dadhania Feb. 23, 2017, 7:56 p.m. UTC

Signed-off-by: Nikunj A Dadhania <[e-mail]>
---
 target/ppc/translate.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

Patch

diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index c98e708..143b595 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -877,7 +877,11 @@  static inline void gen_op_arith_compute_ca32(DisasContext *ctx, TCGv ca32,
     }
 
     t0 = tcg_temp_new();
-    tcg_gen_xor_tl(t0, arg0, arg1);
+    if (sub) {
+        tcg_gen_eqv_tl(t0, arg0, arg1);
+    } else {
+        tcg_gen_xor_tl(t0, arg0, arg1);
+    }
     tcg_gen_xor_tl(t0, t0, res);
     tcg_gen_extract_tl(ca32, t0, 32, 1);
     tcg_temp_free(t0);
@@ -1418,6 +1422,7 @@  static inline void gen_op_arith_subf(DisasContext *ctx, TCGv ret, TCGv arg1,
 {
     TCGv t0 = ret;
     TCGv ca = tcg_temp_new();
+    TCGv ca32 = tcg_temp_new();
 
     if (compute_ca || compute_ov) {
         t0 = tcg_temp_new();
@@ -1446,17 +1451,22 @@  static inline void gen_op_arith_subf(DisasContext *ctx, TCGv ret, TCGv arg1,
             tcg_gen_xor_tl(ca, t0, t1);         /* bits changes w/ carry */
             tcg_temp_free(t1);
             tcg_gen_extract_tl(ca, ca, 32, 1);    /* extract bit 32 */
+            if (is_isa300(ctx)) {
+                tcg_gen_mov_tl(ca32, ca);
+            }
         } else if (add_ca) {
             TCGv zero, inv1 = tcg_temp_new();
             tcg_gen_not_tl(inv1, arg1);
             zero = tcg_const_tl(0);
             tcg_gen_add2_tl(t0, ca, arg2, zero, ca, zero);
             tcg_gen_add2_tl(t0, ca, t0, ca, inv1, zero);
+            gen_op_arith_compute_ca32(ctx, ca32, t0, inv1, arg2, 0);
             tcg_temp_free(zero);
             tcg_temp_free(inv1);
         } else {
             tcg_gen_setcond_tl(TCG_COND_GEU, ca, arg2, arg1);
             tcg_gen_sub_tl(t0, arg2, arg1);
+            gen_op_arith_compute_ca32(ctx, ca32, t0, arg1, arg2, 1);
         }
     } else if (add_ca) {
         /* Since we're ignoring carry-out, we can simplify the
@@ -1472,7 +1482,7 @@  static inline void gen_op_arith_subf(DisasContext *ctx, TCGv ret, TCGv arg1,
         gen_op_arith_compute_ov(ctx, t0, arg1, arg2, 1);
     }
     if (compute_ca) {
-        gen_op_update_ca_legacy(ca);
+        gen_op_update_ca(ctx, ca, ca32);
     }
     if (unlikely(compute_rc0)) {
         gen_set_Rc0(ctx, t0);