From patchwork Fri Mar 3 11:20:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Yongbok Kim X-Patchwork-Id: 9602545 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 783416016C for ; Fri, 3 Mar 2017 11:21:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 67B6428518 for ; Fri, 3 Mar 2017 11:21:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5A819285E8; Fri, 3 Mar 2017 11:21:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D47A328518 for ; Fri, 3 Mar 2017 11:21:20 +0000 (UTC) Received: from localhost ([::1]:57246 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cjlGx-0004ec-Vv for patchwork-qemu-devel@patchwork.kernel.org; Fri, 03 Mar 2017 06:21:20 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53610) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cjlGb-0004X3-9P for qemu-devel@nongnu.org; Fri, 03 Mar 2017 06:20:58 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cjlGW-0007uv-Sv for qemu-devel@nongnu.org; Fri, 03 Mar 2017 06:20:57 -0500 Received: from mailapp01.imgtec.com ([195.59.15.196]:40887) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cjlGW-0007uc-G4 for qemu-devel@nongnu.org; Fri, 03 Mar 2017 06:20:52 -0500 Received: from hhmail02.hh.imgtec.org (unknown [10.100.10.20]) by Forcepoint Email with ESMTPS id DFFE545DFC79; Fri, 3 Mar 2017 11:20:47 +0000 (GMT) Received: from localhost.localdomain (192.168.161.53) by hhmail02.hh.imgtec.org (10.100.10.21) with Microsoft SMTP Server (TLS) id 14.3.294.0; Fri, 3 Mar 2017 11:20:50 +0000 From: Yongbok Kim To: QEMU Developers Date: Fri, 3 Mar 2017 11:20:21 +0000 Message-ID: <1488540021-35506-1-git-send-email-yongbok.kim@imgtec.com> X-Mailer: git-send-email 1.7.5.4 MIME-Version: 1.0 X-Originating-IP: [192.168.161.53] X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 195.59.15.196 Subject: [Qemu-devel] [PATCH] target/mips: hold BQL for timer interrupts X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Hold BQL when accessing timer which can cause interrupts Signed-off-by: Yongbok Kim Reviewed-by: Philippe Mathieu-Daudé --- target/mips/op_helper.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c index b683fcb..e5f3ea4 100644 --- a/target/mips/op_helper.c +++ b/target/mips/op_helper.c @@ -17,6 +17,7 @@ * License along with this library; if not, see . */ #include "qemu/osdep.h" +#include "qemu/main-loop.h" #include "cpu.h" #include "qemu/host-utils.h" #include "exec/helper-proto.h" @@ -827,7 +828,11 @@ target_ulong helper_mftc0_tcschefback(CPUMIPSState *env) target_ulong helper_mfc0_count(CPUMIPSState *env) { - return (int32_t)cpu_mips_get_count(env); + int32_t count; + qemu_mutex_lock_iothread(); + count = (int32_t) cpu_mips_get_count(env); + qemu_mutex_unlock_iothread(); + return count; } target_ulong helper_mftc0_entryhi(CPUMIPSState *env) @@ -1375,7 +1380,9 @@ void helper_mtc0_hwrena(CPUMIPSState *env, target_ulong arg1) void helper_mtc0_count(CPUMIPSState *env, target_ulong arg1) { + qemu_mutex_lock_iothread(); cpu_mips_store_count(env, arg1); + qemu_mutex_unlock_iothread(); } void helper_mtc0_entryhi(CPUMIPSState *env, target_ulong arg1) @@ -1424,7 +1431,9 @@ void helper_mttc0_entryhi(CPUMIPSState *env, target_ulong arg1) void helper_mtc0_compare(CPUMIPSState *env, target_ulong arg1) { + qemu_mutex_lock_iothread(); cpu_mips_store_compare(env, arg1); + qemu_mutex_unlock_iothread(); } void helper_mtc0_status(CPUMIPSState *env, target_ulong arg1) @@ -1475,7 +1484,9 @@ void helper_mtc0_srsctl(CPUMIPSState *env, target_ulong arg1) void helper_mtc0_cause(CPUMIPSState *env, target_ulong arg1) { + qemu_mutex_lock_iothread(); cpu_mips_store_cause(env, arg1); + qemu_mutex_unlock_iothread(); } void helper_mttc0_cause(CPUMIPSState *env, target_ulong arg1) @@ -2296,12 +2307,16 @@ target_ulong helper_rdhwr_synci_step(CPUMIPSState *env) target_ulong helper_rdhwr_cc(CPUMIPSState *env) { + int32_t count; check_hwrena(env, 2, GETPC()); #ifdef CONFIG_USER_ONLY - return env->CP0_Count; + count = env->CP0_Count; #else - return (int32_t)cpu_mips_get_count(env); + qemu_mutex_lock_iothread(); + count = (int32_t)cpu_mips_get_count(env); + qemu_mutex_unlock_iothread(); #endif + return count; } target_ulong helper_rdhwr_ccres(CPUMIPSState *env)