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[81.231.233.234]) by smtp.gmail.com with ESMTPSA id g2sm4031078lfg.65.2017.06.20.08.51.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Jun 2017 08:51:28 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org Date: Tue, 20 Jun 2017 17:51:19 +0200 Message-Id: <1497973886-26257-2-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1497973886-26257-1-git-send-email-edgar.iglesias@gmail.com> References: <1497973886-26257-1-git-send-email-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4010:c07::242 Subject: [Qemu-devel] [PATCH v1 1/8] target-microblaze: Correct bit shift for the PVR0 version field X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sai.pavan.boddu@xilinx.com, edgar.iglesias@xilinx.com, alistai@xilinx.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: "Edgar E. Iglesias" Correct bit shift for the PVR0 version field. Signed-off-by: Edgar E. Iglesias Reviewed-by: Alistair Francis --- target/microblaze/cpu.c | 2 +- target/microblaze/cpu.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 3d58869..af70faa 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -182,7 +182,7 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) (cpu->cfg.use_fpu ? PVR0_USE_FPU_MASK : 0) | (cpu->cfg.use_mmu ? PVR0_USE_MMU_MASK : 0) | (cpu->cfg.endi ? PVR0_ENDI_MASK : 0) | - (version_code << 16) | + (version_code << PVR0_VERSION_SHIFT) | (cpu->cfg.pvr == C_PVR_FULL ? PVR0_PVR_FULL_MASK : 0); env->pvr.regs[2] |= (cpu->cfg.use_fpu ? PVR2_USE_FPU_MASK : 0) | diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index bf6963b..68c33e8 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -129,6 +129,8 @@ typedef struct CPUMBState CPUMBState; #define PVR0_USER1_MASK 0x000000FF #define PVR0_SPROT_MASK 0x00000001 +#define PVR0_VERSION_SHIFT 8 + /* User 2 PVR mask */ #define PVR1_USER2_MASK 0xFFFFFFFF