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[81.231.233.234]) by smtp.gmail.com with ESMTPSA id 25sm3121248ljh.47.2017.06.20.09.09.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Jun 2017 09:09:11 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org Date: Tue, 20 Jun 2017 18:09:02 +0200 Message-Id: <1497974944-27050-6-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1497974944-27050-1-git-send-email-edgar.iglesias@gmail.com> References: <1497974944-27050-1-git-send-email-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4010:c07::244 Subject: [Qemu-devel] [PATCH v1 5/7] target-microblaze: dec_barrel: Add BSEFI X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sai.pavan.boddu@xilinx.com, edgar.iglesias@xilinx.com, alistai@xilinx.com, rth@twiddle.net Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: "Edgar E. Iglesias" Add support for BSEFI. Signed-off-by: Edgar E. Iglesias --- target/microblaze/translate.c | 36 ++++++++++++++++++++++++------------ 1 file changed, 24 insertions(+), 12 deletions(-) diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 6ee4885..4a8ab22 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -660,7 +660,8 @@ static void dec_div(DisasContext *dc) static void dec_barrel(DisasContext *dc) { TCGv t0; - bool s, t; + unsigned int imm_w, imm_s; + bool s, t, e = false; if ((dc->tb_flags & MSR_EE_FLAG) && (dc->cpu->env.pvr.regs[2] & PVR2_ILL_OPCODE_EXC_MASK) @@ -670,27 +671,38 @@ static void dec_barrel(DisasContext *dc) return; } + if (dc->type_b) { + /* Insert and extract are only available in immediate mode. */ + e = extract32(dc->imm, 14, 1); + } s = extract32(dc->imm, 10, 1); t = extract32(dc->imm, 9, 1); + imm_w = extract32(dc->imm, 6, 5); + imm_s = extract32(dc->imm, 0, 5); - LOG_DIS("bs%s%s r%d r%d r%d\n", + LOG_DIS("bs%s%s%s r%d r%d r%d\n", + e ? "e" : "", s ? "l" : "r", t ? "a" : "l", dc->rd, dc->ra, dc->rb); - t0 = tcg_temp_new(); + if (e) { + tcg_gen_extract_i32(cpu_R[dc->rd], cpu_R[dc->ra], imm_s, imm_w); + } else { + t0 = tcg_temp_new(); - tcg_gen_mov_tl(t0, *(dec_alu_op_b(dc))); - tcg_gen_andi_tl(t0, t0, 31); + tcg_gen_mov_tl(t0, *(dec_alu_op_b(dc))); + tcg_gen_andi_tl(t0, t0, 31); - if (s) { - tcg_gen_shl_tl(cpu_R[dc->rd], cpu_R[dc->ra], t0); - } else { - if (t) { - tcg_gen_sar_tl(cpu_R[dc->rd], cpu_R[dc->ra], t0); + if (s) { + tcg_gen_shl_tl(cpu_R[dc->rd], cpu_R[dc->ra], t0); } else { - tcg_gen_shr_tl(cpu_R[dc->rd], cpu_R[dc->ra], t0); + if (t) { + tcg_gen_sar_tl(cpu_R[dc->rd], cpu_R[dc->ra], t0); + } else { + tcg_gen_shr_tl(cpu_R[dc->rd], cpu_R[dc->ra], t0); + } } + tcg_temp_free(t0); } - tcg_temp_free(t0); } static void dec_bit(DisasContext *dc)