From patchwork Thu Sep 21 13:38:07 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Yongbok Kim X-Patchwork-Id: 9963967 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 508016056E for ; Thu, 21 Sep 2017 13:46:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 40D7729502 for ; Thu, 21 Sep 2017 13:46:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 35C5B29504; Thu, 21 Sep 2017 13:46:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4BFDB2950F for ; Thu, 21 Sep 2017 13:46:54 +0000 (UTC) Received: from localhost ([::1]:53800 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dv1nj-0004WG-7g for patchwork-qemu-devel@patchwork.kernel.org; Thu, 21 Sep 2017 09:45:59 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33501) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dv1gf-0007hY-Hj for qemu-devel@nongnu.org; Thu, 21 Sep 2017 09:38:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dv1gZ-0006qc-Vr for qemu-devel@nongnu.org; Thu, 21 Sep 2017 09:38:41 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:29517) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dv1gZ-0006pY-PI for qemu-devel@nongnu.org; Thu, 21 Sep 2017 09:38:35 -0400 Received: from HHMAIL01.hh.imgtec.org (unknown [10.100.10.19]) by Forcepoint Email with ESMTPS id 714382B8AC94E; Thu, 21 Sep 2017 14:38:29 +0100 (IST) Received: from hhmipssw204.hh.imgtec.org (10.100.21.121) by HHMAIL01.hh.imgtec.org (10.100.10.21) with Microsoft SMTP Server (TLS) id 14.3.361.1; Thu, 21 Sep 2017 14:38:32 +0100 From: Yongbok Kim To: Date: Thu, 21 Sep 2017 14:38:07 +0100 Message-ID: <1506001091-8296-4-git-send-email-yongbok.kim@imgtec.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1506001091-8296-1-git-send-email-yongbok.kim@imgtec.com> References: <1506001091-8296-1-git-send-email-yongbok.kim@imgtec.com> MIME-Version: 1.0 X-Originating-IP: [10.100.21.121] X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 195.59.15.196 Subject: [Qemu-devel] [PULL 3/7] mips: split cpu_mips_realize_env() out of cpu_mips_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Philippe Mathieu-Daudé so it can be used in mips_cpu_realizefn() in the next commit Signed-off-by: Philippe Mathieu-Daudé Tested-by: Igor Mammedov Tested-by: James Hogan Reviewed-by: Eduardo Habkost Signed-off-by: Yongbok Kim --- target/mips/internal.h | 1 + target/mips/translate.c | 19 ++++++++++++------- 2 files changed, 13 insertions(+), 7 deletions(-) diff --git a/target/mips/internal.h b/target/mips/internal.h index 91c2df4..cf4c9db 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -132,6 +132,7 @@ void mips_tcg_init(void); /* TODO QOM'ify CPU reset and remove */ void cpu_state_reset(CPUMIPSState *s); +void cpu_mips_realize_env(CPUMIPSState *env); /* cp0_timer.c */ uint32_t cpu_mips_get_random(CPUMIPSState *env); diff --git a/target/mips/translate.c b/target/mips/translate.c index f0febaf..5fc7979 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -20512,6 +20512,17 @@ void mips_tcg_init(void) #include "translate_init.c" +void cpu_mips_realize_env(CPUMIPSState *env) +{ + env->exception_base = (int32_t)0xBFC00000; + +#ifndef CONFIG_USER_ONLY + mmu_init(env, env->cpu_model); +#endif + fpu_init(env, env->cpu_model); + mvp_init(env, env->cpu_model); +} + MIPSCPU *cpu_mips_init(const char *cpu_model) { MIPSCPU *cpu; @@ -20524,13 +20535,7 @@ MIPSCPU *cpu_mips_init(const char *cpu_model) cpu = MIPS_CPU(object_new(TYPE_MIPS_CPU)); env = &cpu->env; env->cpu_model = def; - env->exception_base = (int32_t)0xBFC00000; - -#ifndef CONFIG_USER_ONLY - mmu_init(env, def); -#endif - fpu_init(env, def); - mvp_init(env, def); + cpu_mips_realize_env(env); object_property_set_bool(OBJECT(cpu), true, "realized", NULL);