From patchwork Thu Sep 21 13:38:08 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Yongbok Kim X-Patchwork-Id: 9963953 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 30965600C5 for ; Thu, 21 Sep 2017 13:41:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1B9B129157 for ; Thu, 21 Sep 2017 13:41:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0D39629436; Thu, 21 Sep 2017 13:41:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B5C7129157 for ; Thu, 21 Sep 2017 13:41:15 +0000 (UTC) Received: from localhost ([::1]:53770 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dv1j9-0000Cg-0f for patchwork-qemu-devel@patchwork.kernel.org; Thu, 21 Sep 2017 09:41:15 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33488) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dv1ge-0007gT-DQ for qemu-devel@nongnu.org; Thu, 21 Sep 2017 09:38:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dv1gY-0006pz-Hm for qemu-devel@nongnu.org; Thu, 21 Sep 2017 09:38:40 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:3495) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dv1gY-0006pe-BY for qemu-devel@nongnu.org; Thu, 21 Sep 2017 09:38:34 -0400 Received: from HHMAIL01.hh.imgtec.org (unknown [10.100.10.19]) by Forcepoint Email with ESMTPS id C4CAD73A5D3CF; Thu, 21 Sep 2017 14:38:29 +0100 (IST) Received: from hhmipssw204.hh.imgtec.org (10.100.21.121) by HHMAIL01.hh.imgtec.org (10.100.10.21) with Microsoft SMTP Server (TLS) id 14.3.361.1; Thu, 21 Sep 2017 14:38:33 +0100 From: Yongbok Kim To: Date: Thu, 21 Sep 2017 14:38:08 +0100 Message-ID: <1506001091-8296-5-git-send-email-yongbok.kim@imgtec.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1506001091-8296-1-git-send-email-yongbok.kim@imgtec.com> References: <1506001091-8296-1-git-send-email-yongbok.kim@imgtec.com> MIME-Version: 1.0 X-Originating-IP: [10.100.21.121] X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 195.59.15.196 Subject: [Qemu-devel] [PULL 4/7] mips: call cpu_mips_realize_env() from mips_cpu_realizefn() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Philippe Mathieu-Daudé This changes the order between cpu_mips_realize_env() and cpu_exec_initfn(), but cpu_exec_initfn() don't have anything that depends on cpu_mips_realize_env() being called first. Signed-off-by: Philippe Mathieu-Daudé Tested-by: Igor Mammedov Tested-by: James Hogan Reviewed-by: Eduardo Habkost Signed-off-by: Yongbok Kim --- target/mips/cpu.c | 3 +++ target/mips/translate.c | 1 - 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 68bf423..e3ef835 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -123,6 +123,7 @@ static void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info) { static void mips_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs = CPU(dev); + MIPSCPU *cpu = MIPS_CPU(dev); MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(dev); Error *local_err = NULL; @@ -132,6 +133,8 @@ static void mips_cpu_realizefn(DeviceState *dev, Error **errp) return; } + cpu_mips_realize_env(&cpu->env); + cpu_reset(cs); qemu_init_vcpu(cs); diff --git a/target/mips/translate.c b/target/mips/translate.c index 5fc7979..94c38e8 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -20535,7 +20535,6 @@ MIPSCPU *cpu_mips_init(const char *cpu_model) cpu = MIPS_CPU(object_new(TYPE_MIPS_CPU)); env = &cpu->env; env->cpu_model = def; - cpu_mips_realize_env(env); object_property_set_bool(OBJECT(cpu), true, "realized", NULL);